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* synth: file support (WIP).Tristan Gingold2019-11-123-4/+7
* ghdldrv: adjust after change in Dyn_Tables. Fix breakage.Tristan Gingold2019-11-111-6/+5
* netlists-gates: add comments.Tristan Gingold2019-11-111-0/+3
* netlists-dump: display ports name.Tristan Gingold2019-11-112-12/+29
* netlists: optimize trunc.Tristan Gingold2019-11-114-8/+64
* synth: simplify equality tests.Tristan Gingold2019-11-111-2/+3
* netlists: expand dyn_insert_enTristan Gingold2019-11-112-4/+18
* netlists-expands: handle gaps.Tristan Gingold2019-11-111-12/+12
* netlists: add more support for dyn_insert_enTristan Gingold2019-11-113-6/+21
* netlists: add dyn_insert_en gate.Tristan Gingold2019-11-114-50/+95
* synth: merge partial assignments before merging phis.Tristan Gingold2019-11-112-1/+57
* synth-decls: Only emit unused warnings on signals (andTristan Gingold2019-11-111-4/+8
* dyn_tables: move Table_Initial generic to argument ofTristan Gingold2019-11-1112-21/+20
* synth: move net_table to netlists-utils.Tristan Gingold2019-11-113-13/+14
* netlists: add 2 flags per instance, including a mark flag.Tristan Gingold2019-11-112-6/+33
* synth: initial support for file types. For #1004Tristan Gingold2019-11-115-33/+105
* synth: initial support of access type. For #1004Tristan Gingold2019-11-115-4/+76
* synth-decls: handle unassigned signal/object. For issue 65Tristan Gingold2019-11-073-14/+53
* synth: also handle or short-circuit. For #1005Tristan Gingold2019-11-071-14/+35
* synth: handle record assignment for variables. Fix #1011Tristan Gingold2019-11-061-0/+4
* synth: handle short-circuit and. Fix #1005Tristan Gingold2019-11-061-9/+38
* files_map-editor: add Copy_Source_File.Tristan Gingold2019-11-062-0/+44
* files_map: add Discard_Source_File, Free_Source_File,Tristan Gingold2019-11-062-5/+44
* files_map-editor: turn Replace_Text to a function.Tristan Gingold2019-11-062-30/+35
* vhdl-ieee-std_logic_1164: minor simplification.Tristan Gingold2019-11-061-21/+8
* synth: handle edge operators in synth_predefined_function_call.Tristan Gingold2019-11-064-31/+24
* vhdl: recognize rising_edge/falling_edge.Tristan Gingold2019-11-062-6/+15
* netlists-dump: avoid a crash on unconnected driver.Tristan Gingold2019-11-061-3/+6
* synth: do not create a value_const of a value_const.Tristan Gingold2019-11-062-1/+6
* synth-expr: do subtype conversion in fill_record_aggregate. Fix #1009Tristan Gingold2019-11-061-1/+2
* synth: unshare default value of variables. Fix #1006Tristan Gingold2019-11-062-4/+42
* netlists-cleanup: do not remove the self-instance.Tristan Gingold2019-11-061-0/+2
* synth-stmts: rewrite target_info to clarify memoryTristan Gingold2019-11-051-18/+56
* synth: do more constant propagation (on build2Tristan Gingold2019-11-054-50/+82
* netlists-disp_vhdl: handle truncate to width 1.Tristan Gingold2019-11-051-2/+7
* netlists-memories: truncate wide addresses.Tristan Gingold2019-11-051-11/+9
* synth-oper: simplify code.Tristan Gingold2019-11-051-7/+4
* netlists: add build2_sresize, simplify code.Tristan Gingold2019-11-053-48/+53
* synth: extract netlists-folds from netlists-builders.Tristan Gingold2019-11-0511-160/+216
* netlists-dump: indent output.Tristan Gingold2019-11-053-13/+17
* netlists-memories: adjust message.Tristan Gingold2019-11-051-1/+1
* netlists: enable expansion.Tristan Gingold2019-11-041-1/+1
* synth-oper: handle constant not.Tristan Gingold2019-11-041-3/+8
* synth-expr: allow constants in discrete rangeTristan Gingold2019-11-041-0/+2
* synth-expr: handle vhdl 2008 aggregates (partially).Tristan Gingold2019-11-042-48/+125
* synth-value: export get_bound_length.Tristan Gingold2019-11-041-0/+3
* ghdlmain: simplify code.Tristan Gingold2019-11-041-4/+1
* vhdl-scanner: handle 'synopsys' pragma.Tristan Gingold2019-11-043-16/+19
* ghdlmain: fix deallocation in response file handling.Tristan Gingold2019-11-041-0/+10
* netlists-expands: expand rol.Tristan Gingold2019-11-031-0/+30
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