iCE40/ghdl - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	synth: add support of alias of alias. Fix #945	Tristan Gingold	2019-09-28	1	-0/+8
*	synth: add support for mod operator.	Tristan Gingold	2019-09-28	3	-24/+30
*	netlists-disp_vhdl: improve disp_x_lit.	Tristan Gingold	2019-09-28	1	-3/+9
*	synth-environment: optimize cascaded if.	Tristan Gingold	2019-09-28	1	-1/+27
*	netlists-disp_vhdl: handle id_edge.	Tristan Gingold	2019-09-28	1	-0/+3
*	synth-stmts: simple optimization for loop control logic.	Tristan Gingold	2019-09-28	1	-10/+19
*	synth: disp net number in netlists-dump	Tristan Gingold	2019-09-28	1	-1/+13
*	synth: finalize declarations and free wires.	Tristan Gingold	2019-09-27	6	-21/+214
*	synth: handle range attribute; handle vhdl08 array subtype.	Tristan Gingold	2019-09-27	1	-19/+25
*	synth-environment-debug: improve.	Tristan Gingold	2019-09-26	1	-1/+2
*	synth: handle alias for reshape.	Tristan Gingold	2019-09-26	1	-0/+2
*	synth: do subtype conversion for variable default	Tristan Gingold	2019-09-26	1	-0/+2
*	synth: do subtype conversion for expression at calls.	Tristan Gingold	2019-09-26	2	-15/+10
*	synth: subtype conversion for selected elements.	Tristan Gingold	2019-09-26	1	-1/+2
*	synth: fix handling of single-bit memories.	Tristan Gingold	2019-09-26	2	-5/+13
*	synth: allow entities with no ports.	Tristan Gingold	2019-09-25	1	-1/+0
*	synth: fix crash on slice of slice.	Tristan Gingold	2019-09-25	1	-1/+2
*	synth-stmts: allow slice as case expression.	Tristan Gingold	2019-09-25	1	-1/+1
*	synth: handle array equality (for constances).	Tristan Gingold	2019-09-25	3	-1/+22
*	synth-disp_vhdl: handle in conversions from bitvector. Fix #940	Tristan Gingold	2019-09-25	1	-0/+5
*	synth-oper: handle not for boolean and bit. Fix #937	Tristan Gingold	2019-09-25	1	-1/+3
*	synth-disp_vhdl: handle disp conversion with bits (and boolean).	Tristan Gingold	2019-09-25	1	-5/+17
*	synth: fixes after previous patch.	Tristan Gingold	2019-09-25	4	-8/+16
*	synth: rework type for expression.	Tristan Gingold	2019-09-25	8	-226/+250
*	synth-inference: optimize for controls.	Tristan Gingold	2019-09-23	1	-1/+7
*	synth: Regenerate ghdlsynth_gates.h	Tristan Gingold	2019-09-23	1	-25/+26
*	testsuite/synth: add testcase for previous commit.	Tristan Gingold	2019-09-22	1	-0/+1
*	synth: handle subtype conversions on interfaces.	Tristan Gingold	2019-09-22	2	-10/+31
*	synth: introduce type_unbounded_vector.	Tristan Gingold	2019-09-22	4	-25/+89
*	synth: add more operations.	Tristan Gingold	2019-09-22	1	-2/+13
*	synth: preliminary work for subtype conversions on interfaces.	Tristan Gingold	2019-09-22	4	-13/+26
*	synth: completly disable inference with -di.	Tristan Gingold	2019-09-22	1	-4/+6
*	synth: handle rotate.	Tristan Gingold	2019-09-22	4	-45/+71
*	vhdl: recognize rotate functions.	Tristan Gingold	2019-09-22	4	-3/+24
*	synth: handle exit/next statements.	Tristan Gingold	2019-09-22	2	-5/+207
*	synth: remove T_En from Seq_Context.	Tristan Gingold	2019-09-21	2	-34/+20
*	synth: fix to_unsigned (nat, nat)	Tristan Gingold	2019-09-21	1	-1/+2
*	netlists-disp_vhdl: handle lsr.	Tristan Gingold	2019-09-21	1	-0/+4
*	synth: use constant for constant values.	Tristan Gingold	2019-09-21	2	-30/+64
*	synth: fix tgingold/ghdlsynth-beta#27	Tristan Gingold	2019-09-21	1	-1/+2
*	synth-insts: refactoring	Tristan Gingold	2019-09-21	1	-27/+12
*	synth-insts: remove useless function.	Tristan Gingold	2019-09-21	1	-15/+2
*	synth: do not create self-instance on black-boxed modules.	Tristan Gingold	2019-09-21	3	-6/+12
*	synth: add bit0/bit1 in instance.	Tristan Gingold	2019-09-21	4	-14/+33
*	netlists-dump: disp width of outputs in instances.	Tristan Gingold	2019-09-21	1	-2/+4
*	synth: add Get_Build (WIP).	Tristan Gingold	2019-09-20	4	-8/+20
*	synth: add base_instance.	Tristan Gingold	2019-09-20	4	-23/+55
*	synth: rename get/set_module for instances.	Tristan Gingold	2019-09-20	5	-25/+23
*	synth-context: get rid off Set_Block_Scope.	Tristan Gingold	2019-09-20	6	-35/+24
*	synth-context: make Objects_Array private.	Tristan Gingold	2019-09-20	1	-1/+2