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author | Tristan Gingold <tgingold@free.fr> | 2019-09-21 08:57:46 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-09-21 08:57:46 +0200 |
commit | 098715670d1069444f186b3974255ca5778e727f (patch) | |
tree | 15b2dfd3fadffad5354894fe299a880f774c3b44 /src | |
parent | 3e83d4aa5076b1a8cf2ec2214de36c4f507078c9 (diff) | |
download | ghdl-098715670d1069444f186b3974255ca5778e727f.tar.gz ghdl-098715670d1069444f186b3974255ca5778e727f.tar.bz2 ghdl-098715670d1069444f186b3974255ca5778e727f.zip |
synth: do not create self-instance on black-boxed modules.
Diffstat (limited to 'src')
-rw-r--r-- | src/synth/synth-context.adb | 5 | ||||
-rw-r--r-- | src/synth/synth-context.ads | 4 | ||||
-rw-r--r-- | src/synth/synth-insts.adb | 9 |
3 files changed, 12 insertions, 6 deletions
diff --git a/src/synth/synth-context.adb b/src/synth/synth-context.adb index 730f5b6aa..662dfe1fe 100644 --- a/src/synth/synth-context.adb +++ b/src/synth/synth-context.adb @@ -106,6 +106,7 @@ package body Synth.Context is is Prev_Base : constant Base_Instance_Acc := Inst.Base; Base : Base_Instance_Acc; + Self_Inst : Instance; begin Base := new Base_Instance_Type'(Builder => Prev_Base.Builder, Top_Module => Prev_Base.Top_Module, @@ -113,6 +114,10 @@ package body Synth.Context is Bit0 => No_Net, Bit1 => No_Net); Builders.Set_Parent (Base.Builder, M); + + Self_Inst := Create_Self_Instance (M); + pragma Unreferenced (Self_Inst); + Base.Bit0 := Build_Const_UB32 (Base.Builder, 0, 1); Base.Bit1 := Build_Const_UB32 (Base.Builder, 1, 1); Inst.Base := Base; diff --git a/src/synth/synth-context.ads b/src/synth/synth-context.ads index 708d42a73..055518941 100644 --- a/src/synth/synth-context.ads +++ b/src/synth/synth-context.ads @@ -57,7 +57,6 @@ package Synth.Context is function Get_Top_Module (Inst : Synth_Instance_Acc) return Module; - procedure Set_Instance_Module (Inst : Synth_Instance_Acc; M : Module); function Get_Instance_Module (Inst : Synth_Instance_Acc) return Module; pragma Inline (Get_Instance_Module); @@ -67,6 +66,9 @@ package Synth.Context is function Get_Inst_Bit1 (Inst : Synth_Instance_Acc) return Net; pragma Inline (Get_Inst_Bit0, Get_Inst_Bit1); + -- Start the definition of module M (using INST). + procedure Set_Instance_Module (Inst : Synth_Instance_Acc; M : Module); + procedure Create_Object (Syn_Inst : Synth_Instance_Acc; Decl : Iir; Val : Value_Acc); diff --git a/src/synth/synth-insts.adb b/src/synth/synth-insts.adb index 9996ccfbb..2d2b239f3 100644 --- a/src/synth/synth-insts.adb +++ b/src/synth/synth-insts.adb @@ -163,7 +163,6 @@ package body Synth.Insts is Nbr_Outputs : Port_Nbr; Num : Uns32; Cur_Module : Module; - Self_Inst : Instance; begin if Get_Kind (Params.Decl) = Iir_Kind_Component_Declaration then pragma Assert (Params.Arch = Null_Node); @@ -220,6 +219,8 @@ package body Synth.Insts is end loop; -- Declare module. + -- Build it now because it may be referenced for instantiations before + -- being synthetized. Cur_Module := New_User_Module (Get_Top_Module (Root_Instance), New_Sname_User (Get_Identifier (Decl)), Id_User_None, Nbr_Inputs, Nbr_Outputs, 0); @@ -249,9 +250,6 @@ package body Synth.Insts is Set_Port_Desc (Cur_Module, Inports, Outports); end; - Self_Inst := Create_Self_Instance (Cur_Module); - pragma Unreferenced (Self_Inst); - return Inst_Object'(Decl => Decl, Arch => Arch, Config => Params.Config, @@ -769,7 +767,7 @@ package body Synth.Insts is Entity : constant Node := Inst.Decl; Arch : constant Node := Inst.Arch; Syn_Inst : constant Synth_Instance_Acc := Inst.Syn_Inst; - Self_Inst : constant Instance := Get_Self_Instance (Inst.M); + Self_Inst : Instance; Inter : Node; Nbr_Inputs : Port_Nbr; Nbr_Outputs : Port_Nbr; @@ -780,6 +778,7 @@ package body Synth.Insts is end if; Set_Instance_Module (Syn_Inst, Inst.M); + Self_Inst := Get_Self_Instance (Inst.M); -- Create wires for inputs and outputs. Inter := Get_Port_Chain (Entity); |