| Commit message (Expand) | Author | Age | Files | Lines |
* | vhdl/psl: handle PSL inherit spec. For #1899 | Tristan Gingold | 2021-11-05 | 1 | -26/+67 |
* | synth: Support alias declarations in vunit | tmeissner | 2021-11-02 | 1 | -1/+3 |
* | synth: add support for sequence instance in vunit. Fix #1889 | Tristan Gingold | 2021-10-13 | 1 | -0/+2 |
* | vhdl and psl: parse sync_abort and async_abort. For #1654 | Tristan Gingold | 2021-08-30 | 1 | -1/+3 |
* | vhdl: also allow type and subtype declarations in vunit. For #1724 | Tristan Gingold | 2021-04-15 | 1 | -0/+2 |
* | vhdl: handle constant declarations in PSL vunit. Fix #1724 | Tristan Gingold | 2021-04-15 | 1 | -0/+1 |
* | vhdl-sem_psl.adb: can also extract clock from SERE. For #1721 | Tristan Gingold | 2021-04-13 | 1 | -1/+5 |
* | vhdl-sem_psl.adb: handle goto/equal repeated sequence. For #1708 | Tristan Gingold | 2021-04-05 | 1 | -8/+20 |
* | psl: prefix of goto/non-consecutive repetition is a bool. Fix #1708 | Tristan Gingold | 2021-04-03 | 1 | -8/+12 |
* | src: Handle also Equal Repeat and Goto repeat sequences. Keep TODO about chec... | Ondrej Ille | 2021-03-28 | 1 | -5/+5 |
* | src: Un-handle Equal and Goto repeat sequences in sem_property. Some form of ... | Ondrej Ille | 2021-03-28 | 1 | -10/+5 |
* | psl, vhdl: Extend semantic pass for PSL to allow "assert never <Sequence>" wi... | Ondrej Ille | 2021-03-28 | 1 | -0/+10 |
* | vhdl-sem_psl: factorize code for onehot/onehot0 and stable/fell/rose. | Tristan Gingold | 2021-02-09 | 1 | -89/+6 |
* | Add support for PSL onehot/onehot0 functions (#1633) | T. Meissner | 2021-02-09 | 1 | -0/+32 |
* | update license headers | umarcor | 2021-01-14 | 1 | -11/+9 |
* | vhdl-sem_psl: fix crash in case of error in assert statement. Fix #1480 | Tristan Gingold | 2020-09-28 | 1 | -2/+5 |
* | vhdl: add wildcard_psl_boolean. For #1387 | Tristan Gingold | 2020-07-02 | 1 | -70/+73 |
* | vhdl-sem_psl: avoid a crash in synth on incorrect clock. | Tristan Gingold | 2020-06-30 | 1 | -0/+2 |
* | vhdl psl: add support for equivalence operator. Fix #1371 | Tristan Gingold | 2020-06-16 | 1 | -4/+7 |
* | vhdl: analyze and synth concurrent statements in vunit. Fix #1366 | Tristan Gingold | 2020-06-12 | 1 | -7/+12 |
* | Synthesis of PSL built-in fell() function. | tmeissner | 2020-06-07 | 1 | -0/+35 |
* | Synthesis of PSL built-in rose() function. | tmeissner | 2020-06-06 | 1 | -1/+36 |
* | Synthesis of PSL stable() function. | tmeissner | 2020-06-06 | 1 | -0/+35 |
* | Synthesis of PSL prev function. | Tristan Gingold | 2020-06-02 | 1 | -0/+60 |
* | vhdl-sem_psl: handle equal/goto repeat seq. Fix #1321 | Tristan Gingold | 2020-05-18 | 1 | -1/+3 |
* | vhdl-sem_psl: handle next_event_a and next_event_e. Fix #1292 | Tristan Gingold | 2020-05-09 | 1 | -0/+5 |
* | Add handling of N_Next_E in PSL semantic pass | tmeissner | 2020-05-08 | 1 | -1/+1 |
* | psl: keep locations. | Tristan Gingold | 2020-04-26 | 1 | -4/+6 |
* | psl: keep denoting names in the PSL ast. | Tristan Gingold | 2020-03-13 | 1 | -10/+24 |
* | vhdl: allow attributes in vunit declarations. | Tristan Gingold | 2019-10-30 | 1 | -1/+3 |
* | vhdl: extract sem_concurrent_statement, to handle hdl stmt in vunits. | Tristan Gingold | 2019-10-25 | 1 | -0/+5 |
* | vhdl-sem_psl: analyze some declarations. | Tristan Gingold | 2019-10-23 | 1 | -0/+18 |
* | vhdl: check cover/restrict is followed by a sequence. | Tristan Gingold | 2019-10-16 | 1 | -0/+14 |
* | vhdl: handle cover and restrict within vunit. | Tristan Gingold | 2019-10-15 | 1 | -0/+4 |
* | vhdl: handle architecture in verification unit hierarchical name. | Tristan Gingold | 2019-08-20 | 1 | -7/+37 |
* | vhdl: handle assume in verification units. | Tristan Gingold | 2019-08-20 | 1 | -0/+2 |
* | vhdl: parse verification unit (WIP). | Tristan Gingold | 2019-08-17 | 1 | -3/+82 |
* | vhdl: remove severity from cover, report and severity from assume. | Tristan Gingold | 2019-08-08 | 1 | -18/+9 |
* | Add support for PSL assumptions, used in formal verification (#880) | Pepijn de Vos | 2019-08-07 | 1 | -3/+22 |
* | vhdl: rename Cover_Statement to Cover_Directive. | Tristan Gingold | 2019-07-04 | 1 | -2/+2 |
* | vhdl: parse and analyze restrict directive. | Tristan Gingold | 2019-07-04 | 1 | -0/+15 |
* | vhdl: renames disp_vhdl to prints | Tristan Gingold | 2019-05-30 | 1 | -67/+69 |
* | psl: can keep parenthesis during parse. | Tristan Gingold | 2019-05-24 | 1 | -23/+70 |
* | errorout: add messages group instead of continuation. | Tristan Gingold | 2019-05-12 | 1 | -2/+4 |
* | vhdl: decouple errorouts a bit more. | Tristan Gingold | 2019-05-10 | 1 | -1/+0 |
* | psl: add psl-types, psl-nodes_priv. | Tristan Gingold | 2019-05-10 | 1 | -0/+1 |
* | Extract psl-errors from errorout. | Tristan Gingold | 2019-05-10 | 1 | -0/+1 |
* | vhdl: extract vhdl.errors from errorout. | Tristan Gingold | 2019-05-08 | 1 | -0/+1 |
* | vhdl: handle attributes in psl expressions. Fix #813 | Tristan Gingold | 2019-05-07 | 1 | -1/+2 |
* | vhdl: move iirs_utils to vhdl.utils | Tristan Gingold | 2019-05-06 | 1 | -1/+1 |