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author | tmeissner <programming@goodcleanfun.de> | 2020-06-06 17:45:51 +0200 |
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committer | tgingold <tgingold@users.noreply.github.com> | 2020-06-07 06:17:12 +0200 |
commit | b85e83cd189e4e915ecd1a4ff00d1b81b919c215 (patch) | |
tree | 596eeed70dda1d0a526fa60f4610576104c9f24a /src/vhdl/vhdl-sem_psl.adb | |
parent | d440dae86de77d0743d21dfd8889dfa73d0dc48d (diff) | |
download | ghdl-b85e83cd189e4e915ecd1a4ff00d1b81b919c215.tar.gz ghdl-b85e83cd189e4e915ecd1a4ff00d1b81b919c215.tar.bz2 ghdl-b85e83cd189e4e915ecd1a4ff00d1b81b919c215.zip |
Synthesis of PSL built-in fell() function.
Diffstat (limited to 'src/vhdl/vhdl-sem_psl.adb')
-rw-r--r-- | src/vhdl/vhdl-sem_psl.adb | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/src/vhdl/vhdl-sem_psl.adb b/src/vhdl/vhdl-sem_psl.adb index d34d36918..290e13836 100644 --- a/src/vhdl/vhdl-sem_psl.adb +++ b/src/vhdl/vhdl-sem_psl.adb @@ -193,6 +193,41 @@ package body Vhdl.Sem_Psl is return Call; end Sem_Rose_Builtin; + function Sem_Fell_Builtin (Call : Iir) return Iir + is + use Vhdl.Sem_Expr; + use Vhdl.Std_Package; + Expr : Iir; + Clock : Iir; + First : Boolean; + begin + Expr := Get_Expression (Call); + First := Is_Expr_Not_Analyzed (Expr); + Expr := Sem_Expression (Expr, Null_Iir); + if Expr /= Null_Iir then + Set_Expression (Call, Expr); + Set_Type (Call, Vhdl.Std_Package.Boolean_Type_Definition); + Set_Expr_Staticness (Call, None); + end if; + + if First then + -- Analyze clock only once. + Clock := Get_Clock_Expression (Call); + if Clock /= Null_Iir then + Clock := Sem_Expression_Wildcard (Clock, Wildcard_Psl_Bit_Type); + Set_Clock_Expression (Call, Clock); + else + if Current_Psl_Default_Clock = Null_Iir then + Error_Msg_Sem (+Call, "no clock for PSL fell builtin"); + else + Set_Default_Clock (Call, Current_Psl_Default_Clock); + end if; + end if; + end if; + + return Call; + end Sem_Fell_Builtin; + -- Convert VHDL and/or/not nodes to PSL nodes. function Convert_Bool (Expr : Iir) return PSL_Node is |