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* translate: add Convert_Array_Base. For #1038Tristan Gingold2020-01-273-8/+29
* vhdl/translate: handle implicit record-record conversions.Tristan Gingold2020-01-061-12/+1
* vhdl/translate: minor refactoring.Tristan Gingold2020-01-062-42/+43
* vhdl: fix multiple reference in trans-chap3.Tristan Gingold2020-01-061-2/+6
* vhdl/translate: handle more partially constrained array subtypes. For #1038Tristan Gingold2020-01-063-6/+10
* vhdl: handle untranslated subtypes for record aggregates. Fix #1051Tristan Gingold2020-01-021-3/+12
* ams-vhdl: add frequency function, minor fixes.Tristan Gingold2019-12-301-1/+2
* vhdl: improve support of AMS-vhdl (array and record natures, source quantities)Tristan Gingold2019-12-285-6/+10
* vhdl: recognize intrinsic procedures in vhdl-sem_specs.Tristan Gingold2019-11-231-21/+0
* synth: preliminary work to support intrinsic procedures.Tristan Gingold2019-11-141-0/+21
* vhdl/translate: elaborate dependencies of configurations. Fix #984Tristan Gingold2019-10-241-0/+4
* vhdl: handle P32 in connect_scalar. Fix #918Tristan Gingold2019-09-051-1/+2
* ignore restrict in simulation (#897)Pepijn de Vos2019-08-202-18/+17
* vhdl: handle subtype indication (with range) in discrete_range.Tristan Gingold2019-08-101-0/+1
* vhdl: remove severity from cover, report and severity from assume.Tristan Gingold2019-08-082-6/+26
* Add support for PSL assumptions, used in formal verification (#880)Pepijn de Vos2019-08-075-12/+37
* ghdlsynth: check top entity can be a top entity.Tristan Gingold2019-07-141-1/+1
* vhdl: refactoring: remove configure function with string access.Tristan Gingold2019-07-141-11/+13
* vhdl/translate: reindent.Tristan Gingold2019-07-041-1/+1
* vhdl: rename Cover_Statement to Cover_Directive.Tristan Gingold2019-07-042-12/+12
* vhdl: translate anonymous_signal_declaration.Tristan Gingold2019-07-031-8/+2
* vhdl: add anonymous_signal_declaration.Tristan Gingold2019-07-035-11/+28
* Error_Msg_Option: do not raise exception.Tristan Gingold2019-06-251-6/+6
* vhdl: renames disp_vhdl to printsTristan Gingold2019-05-301-2/+2
* trans-chap8: reverse_range returns false for is_for_loop_iterator_stable.Tristan Gingold2019-05-281-20/+23
* trans-chap3: improve style.Tristan Gingold2019-05-231-3/+2
* Add simple_IO - to be used instead of Text_IO.Tristan Gingold2019-05-194-18/+11
* trans-chap8: handle unbounded records in trans_actual. Fix #788Tristan Gingold2019-05-151-1/+1
* vhdl: decouple errorouts a bit more.Tristan Gingold2019-05-101-4/+4
* psl: add psl-types, psl-nodes_priv.Tristan Gingold2019-05-101-0/+1
* vhdl: replace Iir_Int64 by Int64, and Iir_Fp64 by Fp64.Tristan Gingold2019-05-107-31/+31
* Extract psl-errors from errorout.Tristan Gingold2019-05-101-1/+1
* vhdl: extract vhdl.errors from errorout.Tristan Gingold2019-05-0817-11/+19
* vhdl: renames iirs_walk to vhdl-nodes_walkTristan Gingold2019-05-081-1/+1
* vhdl: renames iir_chains to vhdl.nodes_utils. Remove iir_chain_handling.Tristan Gingold2019-05-062-3/+3
* vhdl: move iirs_utils to vhdl.utilsTristan Gingold2019-05-0615-15/+15
* vhdl: move nodes_meta package to vhdl child.Tristan Gingold2019-05-062-4/+4
* vhdl: rename iirs to vhdl.nodesTristan Gingold2019-05-055-5/+5
* vhdl: move nodes to vhdl.nodes_priv.Tristan Gingold2019-05-051-3/+3
* vhdl: move back_end to vhdl child.Tristan Gingold2019-05-051-4/+4
* vhdl: move evaluation to vhdl child.Tristan Gingold2019-05-055-5/+5
* vhdl: move ieee packages to vhdl children.Tristan Gingold2019-05-052-5/+5
* vhdl: move std_standard package to vhdl child.Tristan Gingold2019-05-058-8/+8
* vhdl: move configuration package as a vhdl child.Tristan Gingold2019-05-053-10/+10
* vhdl: move sem* packages to vhdl children.Tristan Gingold2019-05-054-11/+11
* vhdl: move canon to a vhdl child package.Tristan Gingold2019-05-055-13/+15
* vhdl: move disp_tree and disp_vhdl as vhdl child.Tristan Gingold2019-05-041-2/+2
* vhdl: do not crash on 64 bit null range.Tristan Gingold2019-05-031-1/+3
* vhdl/translate: check_composite_match: rename and handle records.Tristan Gingold2019-05-036-70/+207
* vhdl: supports VHPIDIRECT in mcode backend.Tristan Gingold2019-04-277-89/+144
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