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vhdl
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simulate
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simul-execution.adb
Commit message (
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Author
Age
Files
Lines
*
simulate: remove use of Nam_Buffer.
Tristan Gingold
2018-01-20
1
-26
/
+30
*
simul: remove ports_map from instances (not used).
Tristan Gingold
2018-01-02
1
-1
/
+0
*
simul: adjust instance for conversion in calls.
Tristan Gingold
2017-12-21
1
-5
/
+5
*
simul: Add subprogram body in frames.
Tristan Gingold
2017-12-21
1
-34
/
+43
*
simul: add Kind_Protected instead of reusing Kind_Frame.
Tristan Gingold
2017-12-21
1
-9
/
+15
*
simul: handle protected function in association conversion.
Tristan Gingold
2017-12-21
1
-18
/
+24
*
simul: handle psl endpoints (and adjust issue45).
Tristan Gingold
2017-12-21
1
-2
/
+4
*
simul: handle selected signal assignments.
Tristan Gingold
2017-12-21
1
-45
/
+68
*
simul: create initial driver value.
Tristan Gingold
2017-12-21
1
-6
/
+15
*
simul-debugger: add run command.
Tristan Gingold
2017-12-20
1
-0
/
+2
*
simul: handle call to a function of instantiated package.
Tristan Gingold
2017-12-11
1
-1
/
+15
*
simul: handle open association in implicit procedure
Tristan Gingold
2017-12-11
1
-3
/
+14
*
simul: create_subprogram_instance: handle protected
Tristan Gingold
2017-12-11
1
-3
/
+9
*
simul: Check range of the result of concat operator.
Tristan Gingold
2017-12-11
1
-3
/
+18
*
simul: handle subtype attribute
Tristan Gingold
2017-12-11
1
-0
/
+3
*
simul: use same message format for failed assertion.
Tristan Gingold
2017-12-11
1
-14
/
+13
*
simul: emit proper error message for negative timeout.
Tristan Gingold
2017-12-11
1
-2
/
+1
*
simul: fix 'value for physical types.
Tristan Gingold
2017-12-11
1
-1
/
+1
*
simul: replace Get_Instance_For_Slot by Get_Instance_Object.
Tristan Gingold
2017-12-11
1
-19
/
+13
*
simul-execution: fix creation of subprogram frame for shared generic packages.
Tristan Gingold
2017-12-08
1
-29
/
+38
*
simul: fix execution of actual expression.
Tristan Gingold
2017-12-06
1
-10
/
+30
*
simul: handle unconstrained case choice.
Tristan Gingold
2017-12-05
1
-1
/
+17
*
simul: psl default clock, unaffected waveform.
Tristan Gingold
2017-12-05
1
-0
/
+2
*
simul: handle interface subprogram.
Tristan Gingold
2017-12-05
1
-2
/
+3
*
simul: handle package interface, remove iir_value_environment.
Tristan Gingold
2017-12-05
1
-6
/
+0
*
simul: handle instantiated package.
Tristan Gingold
2017-12-05
1
-6
/
+24
*
simul: add support for case generate statetement.
Tristan Gingold
2017-12-04
1
-5
/
+4
*
simul: WIP for nested packages.
Tristan Gingold
2017-12-04
1
-2
/
+6
*
simul: add iir_value_instance, remove package_instances.
Tristan Gingold
2017-12-03
1
-1
/
+1
*
simul: add global_info.
Tristan Gingold
2017-12-03
1
-20
/
+17
*
simul: refactoring: scope is now the corresponding sim_info.
Tristan Gingold
2017-12-03
1
-9
/
+21
*
Create the simul.ads package (for a namespace).
Tristan Gingold
2017-11-24
1
-0
/
+4831