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author | Tristan Gingold <tgingold@free.fr> | 2017-12-18 20:05:25 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2017-12-21 07:36:46 +0100 |
commit | 53829efd96276a1cfd1b249cfc7cb53c549fda73 (patch) | |
tree | b87a893d14d070eb263b20da766c7545c7480e42 /src/vhdl/simulate/simul-execution.adb | |
parent | 6e63d78e54e243b864bacf376c481760362b0825 (diff) | |
download | ghdl-53829efd96276a1cfd1b249cfc7cb53c549fda73.tar.gz ghdl-53829efd96276a1cfd1b249cfc7cb53c549fda73.tar.bz2 ghdl-53829efd96276a1cfd1b249cfc7cb53c549fda73.zip |
simul: create initial driver value.
Diffstat (limited to 'src/vhdl/simulate/simul-execution.adb')
-rw-r--r-- | src/vhdl/simulate/simul-execution.adb | 21 |
1 files changed, 15 insertions, 6 deletions
diff --git a/src/vhdl/simulate/simul-execution.adb b/src/vhdl/simulate/simul-execution.adb index 48c5470b1..990ff8e2e 100644 --- a/src/vhdl/simulate/simul-execution.adb +++ b/src/vhdl/simulate/simul-execution.adb @@ -2524,27 +2524,37 @@ package body Simul.Execution is end if; end Execute_Expression_With_Type; - function Execute_Signal_Init_Value (Block : Block_Instance_Acc; Expr : Iir) - return Iir_Value_Literal_Acc + function Execute_Signal_Name + (Block : Block_Instance_Acc; Expr : Iir; Kind : Signal_Slot) + return Iir_Value_Literal_Acc is Base : constant Iir := Get_Object_Prefix (Expr, False); Info : constant Sim_Info_Acc := Get_Info (Base); Bblk : Block_Instance_Acc; + Slot : Object_Slot_Type; Base_Val : Iir_Value_Literal_Acc; Res : Iir_Value_Literal_Acc; Is_Sig : Boolean; begin if Get_Kind (Base) = Iir_Kind_Object_Alias_Declaration then Bblk := Get_Instance_By_Scope (Block, Info.Obj_Scope); - Base_Val := Execute_Signal_Init_Value (Bblk, Get_Name (Base)); + Base_Val := Execute_Signal_Name (Bblk, Get_Name (Base), Kind); else Bblk := Get_Instance_By_Scope (Block, Info.Obj_Scope); - Base_Val := Bblk.Objects (Info.Slot + 1); + case Kind is + when Signal_Sig => + Slot := Info.Slot; + when Signal_Val => + Slot := Info.Slot + 1; + when Signal_Init => + Slot := Info.Slot + 2; + end case; + Base_Val := Bblk.Objects (Slot); end if; Execute_Name_With_Base (Block, Expr, Base_Val, Res, Is_Sig); pragma Assert (Is_Sig); return Res; - end Execute_Signal_Init_Value; + end Execute_Signal_Name; -- Indexed element will be at Pfx.Val_Array.V (Pos + 1) procedure Execute_Indexed_Name (Block: Block_Instance_Acc; @@ -2728,7 +2738,6 @@ package body Simul.Execution is when Iir_Kind_Aggregate => Res := Execute_Name_Aggregate (Block, Expr, Get_Type (Expr)); - -- FIXME: is_sig ? when Iir_Kind_Image_Attribute => Res := Execute_Image_Attribute (Block, Expr); |