aboutsummaryrefslogtreecommitdiffstats
path: root/src/vhdl/simulate/simul-execution.adb
Commit message (Expand)AuthorAgeFilesLines
* update license headersumarcor2021-01-141-11/+9
* types: introduce Direction_Type, which replaces Iir_Direction.Tristan Gingold2020-04-201-41/+41
* vhdl: move get_subprogram_body_origin to vhdl-sem_inst.Tristan Gingold2020-03-241-18/+1
* vhdl: decouple annotations from environments.Tristan Gingold2019-06-191-53/+28
* grt: extract grt.to_strings from grt.imagesTristan Gingold2019-06-011-9/+10
* Add simple_IO - to be used instead of Text_IO.Tristan Gingold2019-05-191-13/+13
* vhdl: replace Iir_Int64 by Int64, and Iir_Fp64 by Fp64.Tristan Gingold2019-05-101-6/+7
* vhdl: extract vhdl.errors from errorout.Tristan Gingold2019-05-081-1/+1
* vhdl: renames iir_chains to vhdl.nodes_utils. Remove iir_chain_handling.Tristan Gingold2019-05-061-1/+1
* vhdl: move iirs_utils to vhdl.utilsTristan Gingold2019-05-061-1/+1
* vhdl: move evaluation to vhdl child.Tristan Gingold2019-05-051-6/+6
* vhdl: move std_standard package to vhdl child.Tristan Gingold2019-05-051-3/+3
* vhdl: move sem* packages to vhdl children.Tristan Gingold2019-05-051-3/+3
* fix gnat8 errors for libghdlsynth targetsStefan Biereigel2019-03-131-1/+0
* simul: refactoring.Tristan Gingold2019-01-111-21/+19
* simul: handle array values. Reformating.Tristan Gingold2018-12-291-83/+87
* iir_kind_selected_element: use Named_Entity for homogeneity.Tristan Gingold2018-12-181-2/+2
* Extract grt.astdio.vhdl from grt.astdio.Tristan Gingold2018-12-161-2/+2
* Add support for --time-resolution (jit only). Fix #613Tristan Gingold2018-08-101-3/+1
* simulate: remove use of Nam_Buffer.Tristan Gingold2018-01-201-26/+30
* simul: remove ports_map from instances (not used).Tristan Gingold2018-01-021-1/+0
* simul: adjust instance for conversion in calls.Tristan Gingold2017-12-211-5/+5
* simul: Add subprogram body in frames.Tristan Gingold2017-12-211-34/+43
* simul: add Kind_Protected instead of reusing Kind_Frame.Tristan Gingold2017-12-211-9/+15
* simul: handle protected function in association conversion.Tristan Gingold2017-12-211-18/+24
* simul: handle psl endpoints (and adjust issue45).Tristan Gingold2017-12-211-2/+4
* simul: handle selected signal assignments.Tristan Gingold2017-12-211-45/+68
* simul: create initial driver value.Tristan Gingold2017-12-211-6/+15
* simul-debugger: add run command.Tristan Gingold2017-12-201-0/+2
* simul: handle call to a function of instantiated package.Tristan Gingold2017-12-111-1/+15
* simul: handle open association in implicit procedureTristan Gingold2017-12-111-3/+14
* simul: create_subprogram_instance: handle protectedTristan Gingold2017-12-111-3/+9
* simul: Check range of the result of concat operator.Tristan Gingold2017-12-111-3/+18
* simul: handle subtype attributeTristan Gingold2017-12-111-0/+3
* simul: use same message format for failed assertion.Tristan Gingold2017-12-111-14/+13
* simul: emit proper error message for negative timeout.Tristan Gingold2017-12-111-2/+1
* simul: fix 'value for physical types.Tristan Gingold2017-12-111-1/+1
* simul: replace Get_Instance_For_Slot by Get_Instance_Object.Tristan Gingold2017-12-111-19/+13
* simul-execution: fix creation of subprogram frame for shared generic packages.Tristan Gingold2017-12-081-29/+38
* simul: fix execution of actual expression.Tristan Gingold2017-12-061-10/+30
* simul: handle unconstrained case choice.Tristan Gingold2017-12-051-1/+17
* simul: psl default clock, unaffected waveform.Tristan Gingold2017-12-051-0/+2
* simul: handle interface subprogram.Tristan Gingold2017-12-051-2/+3
* simul: handle package interface, remove iir_value_environment.Tristan Gingold2017-12-051-6/+0
* simul: handle instantiated package.Tristan Gingold2017-12-051-6/+24
* simul: add support for case generate statetement.Tristan Gingold2017-12-041-5/+4
* simul: WIP for nested packages.Tristan Gingold2017-12-041-2/+6
* simul: add iir_value_instance, remove package_instances.Tristan Gingold2017-12-031-1/+1
* simul: add global_info.Tristan Gingold2017-12-031-20/+17
* simul: refactoring: scope is now the corresponding sim_info.Tristan Gingold2017-12-031-9/+21
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-16 02:52:19 +0000