| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | synth: fix and add checks for memory management. | Tristan Gingold | 2022-09-10 | 1 | -2/+4 |
| * | synth: use areapools | Tristan Gingold | 2022-09-02 | 1 | -1/+4 |
| * | synth: factorize code for synth_subtype_conversion | Tristan Gingold | 2022-08-21 | 1 | -1/+1 |
| * | synth: add value_dyn_alias in elab-vhdl_values | Tristan Gingold | 2022-05-25 | 1 | -0/+10 |
| * | synth: do full elaboration before synthesis | Tristan Gingold | 2021-11-01 | 1 | -114/+33 |
| * | synth: factorize code to create base instance | Tristan Gingold | 2021-08-28 | 1 | -10/+3 |
| * | synth: use a generic version of synth-environment. | Tristan Gingold | 2021-04-27 | 1 | -1/+1 |
| * | synth: rename synth-context to synth-vhdl_context | Tristan Gingold | 2021-04-16 | 1 | -0/+205 |
 |
index : iCE40/ghdl | |
| [no description] |
| aboutsummaryrefslogtreecommitdiffstats |