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| author | Tristan Gingold <tgingold@free.fr> | 2022-08-21 14:10:08 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2022-08-21 14:10:08 +0200 |
| commit | 00ca739542639e5de0578bf1e62f04e380772f52 (patch) | |
| tree | 4cf24896c94e2f28ada3528485257c1eab110f85 /src/synth/synth-vhdl_context.ads | |
| parent | 78b29a7a47636cb2fda1112f3e2ec8167c3e7d66 (diff) | |
| download | ghdl-00ca739542639e5de0578bf1e62f04e380772f52.tar.gz ghdl-00ca739542639e5de0578bf1e62f04e380772f52.tar.bz2 ghdl-00ca739542639e5de0578bf1e62f04e380772f52.zip | |
synth: factorize code for synth_subtype_conversion
Diffstat (limited to 'src/synth/synth-vhdl_context.ads')
| -rw-r--r-- | src/synth/synth-vhdl_context.ads | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/synth/synth-vhdl_context.ads b/src/synth/synth-vhdl_context.ads index 59f18f960..2b4571c23 100644 --- a/src/synth/synth-vhdl_context.ads +++ b/src/synth/synth-vhdl_context.ads @@ -45,7 +45,7 @@ package Synth.Vhdl_Context is Base : Base_Instance_Acc; Name : Sname := No_Sname); - procedure Set_Extra (Inst :Synth_Instance_Acc; + procedure Set_Extra (Inst : Synth_Instance_Acc; Parent : Synth_Instance_Acc; Name : Sname := No_Sname); |