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* synth: internal refactoringTristan Gingold2022-10-294-121/+93
* elab-vhdl_types: abstract elab_floating_type_definitionTristan Gingold2022-10-291-10/+15
* testsuite/synth: add a test for #2234Tristan Gingold2022-10-294-0/+775
* synth: fix crash in disp_verilog. Fix #2234Tristan Gingold2022-10-291-3/+8
* synth: handle copyback associations in any order.Tristan Gingold2022-10-191-12/+30
* synth-vhdl_eval: handle std_logic_misc reduce functionsTristan Gingold2022-10-191-0/+27
* testsuite/synth: add tests for std_logic_misc reduce functionsTristan Gingold2022-10-194-16/+90
* synth-vhdl_oper: handle xor/nand/nor/xnor reduce from std_logic_miscTristan Gingold2022-10-191-16/+34
* testsuite/synth: add a test for #2224Tristan Gingold2022-10-192-0/+23
* synth-vhdl_oper: handle and_reduce. Fix #2224Tristan Gingold2022-10-191-1/+10
* testsuite/synth: add a test for #2222Tristan Gingold2022-10-182-0/+28
* synth: extract elab-vhdl_utils from synth-vhdl_stmts.Tristan Gingold2022-10-183-142/+241
* testsuite/gna: add test for #2221Tristan Gingold2022-10-182-0/+42
* vhdl-sem_assocs: handle association with external signal names.Tristan Gingold2022-10-184-63/+77
* gha: disable macosx-12 buildTristan Gingold2022-10-171-1/+1
* workflows: adjust macosx deployment targetTristan Gingold2022-10-171-1/+1
* win64: fix FP argument passingTristan Gingold2022-10-171-2/+8
* testsuite/gna: add a test for #2215Tristan Gingold2022-10-173-0/+55
* github action: set macosx deployment env variableTristan Gingold2022-10-171-0/+1
* testsuite/gna: add a test for #2218Tristan Gingold2022-10-163-0/+58
* vhdl-sem_expr.adb: avoid crash after error on aggregate. Fix #2218Tristan Gingold2022-10-161-0/+6
* testsuite/gna: add a test for #2217Tristan Gingold2022-10-164-0/+79
* vhdl-sem_expr.adb(is_string_type): check character type.Tristan Gingold2022-10-161-1/+3
* testsuite/gna: add a test for #2219Tristan Gingold2022-10-142-0/+39
* vhdl-parse.adb: handle external names as assignment target.Tristan Gingold2022-10-141-2/+4
* synth: handle record conversionTristan Gingold2022-10-141-0/+3
* synth-vhdl_expr: support alias in indexed namesTristan Gingold2022-10-141-1/+2
* synth: avoid extra conversion during alias elaborationTristan Gingold2022-10-141-6/+4
* simul: fix spurious error about multiple driversTristan Gingold2022-10-141-0/+2
* simul: handle delayed attributeTristan Gingold2022-10-142-6/+66
* synth: handle alias of access objects.Tristan Gingold2022-10-131-1/+1
* simul: handle last_event and last_activeTristan Gingold2022-10-133-4/+114
* elab-vhd_expr: handle more cases in exec_type_of_objectTristan Gingold2022-10-131-1/+4
* simul-vhdl_simul: keep default value of collapsed signalsTristan Gingold2022-10-131-1/+10
* simul-vhdl_elab: fix crash on association with implicit signalsTristan Gingold2022-10-131-1/+4
* simul: fix a crash due to missing strideTristan Gingold2022-10-131-5/+7
* testsuite/synth: add a test for #2214Tristan Gingold2022-10-134-0/+346
* synth-vhdl_stmts(synth_verification_unit): always set instance_pool.Tristan Gingold2022-10-131-1/+3
* testsuite/suite_driver.sh: disp log in case of failureTristan Gingold2022-10-111-1/+2
* synth: fix crashes on scalar attribute with anonymous subtype.Tristan Gingold2022-10-101-2/+2
* testsuite/gna: add a test for #2212Tristan Gingold2022-10-102-0/+33
* vhdl-canon: avoid a crash on optionnal condition. Fix #2212Tristan Gingold2022-10-101-1/+1
* simul: handle guarded concurrent assignmentsTristan Gingold2022-10-101-14/+32
* simul-vhdl_debug: handle state before elaborationTristan Gingold2022-10-101-0/+8
* testsuite/gna: add a test for #2209Tristan Gingold2022-10-082-0/+19
* vhdl-sem.adb(are_trees_equal): handle parenthesis expressions.Tristan Gingold2022-10-081-0/+4
* simul: signal attributes in actualsTristan Gingold2022-10-061-2/+4
* simul: complete concurrent procedure callsTristan Gingold2022-10-063-29/+43
* simul: fix initial value of record signalsTristan Gingold2022-10-061-2/+2
* simul: recompute object alias offsetsTristan Gingold2022-10-061-1/+14
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