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* vhdl: recognize std_logic_unsigned.conv_integer.Tristan Gingold2019-10-134-20/+31
| | | | Handle more operators in synth.
* netlists-iterators: avoid a crash if no ports.Tristan Gingold2019-10-131-3/+1
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* netlists-dump: improve output.Tristan Gingold2019-10-131-9/+28
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* netlists-builders: adjust names of dyn_extract ports.Tristan Gingold2019-10-131-2/+2
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* Show error on wait without condition (#976)Pepijn de Vos2019-10-131-0/+4
| | | | | | * Show error on wait without condition * Null node
* add record (in)equality (#975)Pepijn de Vos2019-10-131-2/+4
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* vhdl: recognize conv_integer functions from std_logic_arith.Tristan Gingold2019-10-117-195/+218
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* vhdl: recognize std_logic_signed package (from synopsys).Tristan Gingold2019-10-119-24/+85
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* vhdl: recognize minus from std_logic_unsignedTristan Gingold2019-10-114-23/+44
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* vhdl: do not try to recognize mentor version of std_logic_arith.Tristan Gingold2019-10-101-0/+7
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* synth: remove synth-typesTristan Gingold2019-10-104-91/+13
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* netlists: add internings child package.Tristan Gingold2019-10-103-14/+61
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* ghdlsynth: add --out=none to not display the result.Tristan Gingold2019-10-101-1/+6
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* netlists-disp_vhdl: fix pasto on id_asr.Tristan Gingold2019-10-101-5/+5
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* vhdl: improve error message for redefinition of libraryTristan Gingold2019-10-101-1/+1
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* testsuite/synth: add testcase for previous commit.Tristan Gingold2019-10-103-0/+70
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* synth: handle constants for enum equality.Tristan Gingold2019-10-101-1/+5
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* netlists: give a name to the free module.Tristan Gingold2019-10-101-2/+4
| | | | In order to avoid crashes in dumps.
* synth: rewrite cleanup pass.Tristan Gingold2019-10-107-68/+188
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* synth-decls: ignore use clauses.Tristan Gingold2019-10-101-0/+2
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* synth-opeer: extend synth_uresizeTristan Gingold2019-10-101-1/+1
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* synth-oper: handle more operators.Tristan Gingold2019-10-101-3/+6
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* vhdl: recognize conv_unsigned from ieee.std_logic_arith.Tristan Gingold2019-10-108-175/+382
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* testsuite/synth: add testcase for previous commit.Tristan Gingold2019-10-093-1/+47
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* synth: set name on generate statements.Tristan Gingold2019-10-092-6/+16
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* synth: set location on instances.Tristan Gingold2019-10-091-0/+1
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* synth: use synth.source for setting location.Tristan Gingold2019-10-098-17/+34
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* testsuite/synth: add a test for aggregate to net.Tristan Gingold2019-10-093-0/+85
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* netlists-disp_vhdl: handle const_SB32Tristan Gingold2019-10-091-1/+2
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* testsuite/synth: add a test for previous commit.Tristan Gingold2019-10-093-1/+51
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* synth-environment: fix a thinko.Tristan Gingold2019-10-091-1/+2
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* synth: improve support of procedure calls.Tristan Gingold2019-10-081-20/+25
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* testsuite/syn: add testcase for #973Tristan Gingold2019-10-083-0/+54
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* synth: handle read-only aliases. Fix #973Tristan Gingold2019-10-081-1/+9
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* synth-context: fix encoding of discrete in aggregateTristan Gingold2019-10-081-1/+1
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* testsuite/synth: add a test for the previous commit.Tristan Gingold2019-10-084-2/+41
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* synth-disp_vhdl: fix incorrect code for record of widthTristan Gingold2019-10-081-1/+3
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* synth: fix mul sgn sgn width.Tristan Gingold2019-10-082-8/+9
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* testsuite/synth: add tests for previous commit.Tristan Gingold2019-10-087-1/+298
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* synth: fix incorrect order for concat.Tristan Gingold2019-10-082-3/+6
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* testsuite/synth: add a test.Tristan Gingold2019-10-084-0/+63
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* testsuite/synth: add a test for previous commit.Tristan Gingold2019-10-087-1/+97
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* synth-disp_vhdl: handle array/record of 1 element.Tristan Gingold2019-10-081-3/+11
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* synth: handle subprograms in package body.Tristan Gingold2019-10-081-0/+5
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* testsuite/synth: add another test.Tristan Gingold2019-10-083-1/+90
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* testsuite/synth: add a test.Tristan Gingold2019-10-083-0/+87
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* testsuite/synth: add testcase for #964Tristan Gingold2019-10-083-0/+99
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* synth: infere_ff: handle pre-enable. Fix #964Tristan Gingold2019-10-081-23/+63
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* synth: handle case statement on bit vectors.Tristan Gingold2019-10-071-0/+23
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* testsuite/synth: add test for previous commit.Tristan Gingold2019-10-073-0/+27
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