iCE40/ghdl - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
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*	synth-insts: create net object for input port. Fix	Tristan Gingold	2019-09-30	1	-3/+14
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*	synth: renaming and minor refactoring.	Tristan Gingold	2019-09-30	4	-74/+43
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*	synth: minor refactoring.	Tristan Gingold	2019-09-30	1	-4/+4
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*	synth-expr: minor factorisation.	Tristan Gingold	2019-09-30	1	-25/+19
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*	testsuite/synth: add a test for 'to' direction.	Tristan Gingold	2019-09-30	3	-1/+64
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*	testsuite: add test for previous commit.	Tristan Gingold	2019-09-30	1	-0/+11
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*	vhdl-std_package: reduce cascaded error messages.	Tristan Gingold	2019-09-30	1	-0/+1
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*	synth-decls: improve handling of subtype aliases for	Tristan Gingold	2019-09-30	1	-26/+42
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*	testsuite/synth: add testcase for #947	Tristan Gingold	2019-09-30	2	-0/+32
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*	synth: check matching bounds for array equality. Fix #947	Tristan Gingold	2019-09-30	3	-4/+56
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*	testsuite/synth: add testcase for #946	Tristan Gingold	2019-09-30	2	-0/+34
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*	synth: convert subtype in alias declaration. Fix #946	Tristan Gingold	2019-09-30	1	-2/+6
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*	testsuite/synth: add testcase for #948	Tristan Gingold	2019-09-30	3	-1/+33
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*	synth: handle alias for is_const. Fix #948	Tristan Gingold	2019-09-30	1	-2/+3
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*	synth: handle conversion from slice to unbounded vector.	Tristan Gingold	2019-09-30	1	-0/+2
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*	synth: handle while-loop statement.	Tristan Gingold	2019-09-30	1	-0/+39
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*	synth: special handling of 'const' functions.	Tristan Gingold	2019-09-30	7	-16/+134
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*	synth: slice: avoid crash in case of incorrect slice.	Tristan Gingold	2019-09-30	1	-4/+4
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*	synth: refactoring of alias (allow alias of anything).	Tristan Gingold	2019-09-30	7	-34/+40
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*	testsuite/synth: add a test for previous commit (dyn slice).	Tristan Gingold	2019-09-30	3	-1/+84
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*	synth: handle slice with index from a record.	Tristan Gingold	2019-09-30	1	-5/+15
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*	synth: introduce type_logic	Tristan Gingold	2019-09-29	6	-16/+42
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*	testsuite/synth: add testcase for #945	Tristan Gingold	2019-09-28	3	-0/+30
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*	synth: add support of alias of alias. Fix #945	Tristan Gingold	2019-09-28	1	-0/+8
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*	synth: add support for mod operator.	Tristan Gingold	2019-09-28	3	-24/+30
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*	netlists-disp_vhdl: improve disp_x_lit.	Tristan Gingold	2019-09-28	1	-3/+9
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*	testsuite/sync: re-enable func08	Tristan Gingold	2019-09-28	1	-1/+1
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*	synth-environment: optimize cascaded if.	Tristan Gingold	2019-09-28	1	-1/+27
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*	netlists-disp_vhdl: handle id_edge.	Tristan Gingold	2019-09-28	1	-0/+3
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*	testsuite/synth: add if01	Tristan Gingold	2019-09-28	3	-0/+75
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*	testsuite/synth/func01: replace func08 by func08b (need to optimize).	Tristan Gingold	2019-09-28	3	-1/+61
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*	synth-stmts: simple optimization for loop control logic.	Tristan Gingold	2019-09-28	1	-10/+19
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*	synth: disp net number in netlists-dump	Tristan Gingold	2019-09-28	1	-1/+13
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*	synth: finalize declarations and free wires.	Tristan Gingold	2019-09-27	6	-21/+214
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*	testsuite/synth: add testcase for #944	Tristan Gingold	2019-09-27	2	-0/+33
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*	synth: handle range attribute; handle vhdl08 array subtype.	Tristan Gingold	2019-09-27	1	-19/+25
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*	synth-environment-debug: improve.	Tristan Gingold	2019-09-26	1	-1/+2
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*	synth: handle alias for reshape.	Tristan Gingold	2019-09-26	1	-0/+2
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*	synth: do subtype conversion for variable default	Tristan Gingold	2019-09-26	1	-0/+2
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*	synth: do subtype conversion for expression at calls.	Tristan Gingold	2019-09-26	2	-15/+10
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*	testsuite/synth: add testcase from tgingold/ghdlsynth-beta#14	Tristan Gingold	2019-09-26	5	-0/+180
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*	synth: subtype conversion for selected elements.	Tristan Gingold	2019-09-26	1	-1/+2
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*	testsuite/synth: add testcase for single bit memory.	Tristan Gingold	2019-09-26	3	-1/+64
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*	synth: fix handling of single-bit memories.	Tristan Gingold	2019-09-26	2	-5/+13
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*	testsuite/synth: add testcase for #936	Tristan Gingold	2019-09-25	2	-0/+13
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*	synth: allow entities with no ports.	Tristan Gingold	2019-09-25	1	-1/+0
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*	testsuite/synth: add testcase for slice of slice.	Tristan Gingold	2019-09-25	3	-1/+39
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*	synth: fix crash on slice of slice.	Tristan Gingold	2019-09-25	1	-1/+2
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*	testsuite/synth: add testcase for previous commit.	Tristan Gingold	2019-09-25	4	-5/+51
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*	synth-stmts: allow slice as case expression.	Tristan Gingold	2019-09-25	1	-1/+1
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