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* testsuite: add a test for #1018Tristan Gingold2019-12-052-0/+36
* netlists-disp_vhdl: handle 1-bit add/sub.Tristan Gingold2019-12-051-4/+12
* netlists-memories: avoid a crash when no read. Fix #1018Tristan Gingold2019-12-051-1/+7
* netlists-disp_vhdl: handle more ROMs.Tristan Gingold2019-12-051-2/+12
* netlists-memories: improve ROM inference. For issue #1008Tristan Gingold2019-12-051-26/+48
* netlists-dump: adjust can_inline after cleanup ofTristan Gingold2019-12-051-4/+20
* netlists-memories: generate mem_rd_sync gates.Tristan Gingold2019-12-052-170/+142
* netlists-gates: add comments.Tristan Gingold2019-12-051-3/+13
* netlists-disp_vhdl: handle id_mem_rd_syncTristan Gingold2019-12-051-0/+15
* netlists: add enable port to id_mem_rd_sync.Tristan Gingold2019-12-052-10/+20
* netlists: add remove_output_gates.Tristan Gingold2019-12-053-0/+31
* netlists-memories: rework.Tristan Gingold2019-12-053-3/+857
* synth: add set_location_maybe (for roms).Tristan Gingold2019-12-053-2/+35
* ghdlsynth: fix crash on synthesis of a second design.Tristan Gingold2019-12-051-0/+4
* testsuite: add test for #1050Tristan Gingold2019-12-042-0/+47
* netlists-disp_vhdl: handle unconnected outputs. Fix #1050Tristan Gingold2019-12-041-10/+10
* testsuite: add test for #1007Tristan Gingold2019-12-033-0/+59
* synth: create unique instance name. Fix #1007Tristan Gingold2019-12-032-4/+155
* synth: add static neg for signed.Tristan Gingold2019-12-033-0/+42
* synth: support multiple synthesis.Tristan Gingold2019-12-027-21/+82
* testcase: complete test for #1044.Tristan Gingold2019-12-011-0/+3
* synth: handle static float unary +, abs and exp. For #1044.Tristan Gingold2019-12-011-0/+7
* testsuite: adjust previous case for #1048Tristan Gingold2019-12-011-1/+1
* synth-insts: use current prefix for instantiations. Fix #1048Tristan Gingold2019-12-011-1/+2
* library/ieee: re-import math_real and math_complex from vhdl 2019.Tristan Gingold2019-12-014-1940/+1917
* ieee2008: import packages from vhdl 2019.Tristan Gingold2019-12-0122-3431/+3398
* testsuite: remove artifact.Tristan Gingold2019-11-301-10/+0
* netlists-dump: add option --disp-noidTristan Gingold2019-11-303-16/+50
* testsuite: add some tests for #1044Tristan Gingold2019-11-302-0/+31
* synth: add synth_static_monadic_predefinedTristan Gingold2019-11-303-32/+106
* testsuite: add case for #1047Tristan Gingold2019-11-302-0/+53
* synth-stmts: unapply configuration. Fix #1047Tristan Gingold2019-11-301-0/+2
* testsuite: add case for #1046Tristan Gingold2019-11-293-0/+50
* synth-static_oper: add support for array array concat. Fix #1046Tristan Gingold2019-11-293-41/+47
* synth-static_oper: add +,-,* for floats. For #1044Tristan Gingold2019-11-291-2/+7
* testsuite: add case for #1041Tristan Gingold2019-11-292-0/+51
* synth-inference: adjust guard. Fix #1041Tristan Gingold2019-11-291-1/+3
* testsuite: add test case for #1043Tristan Gingold2019-11-282-0/+34
* synth-expr: strip const for synth_type_conversion. Fix #1043Tristan Gingold2019-11-281-0/+1
* testsuite: add testcase for #1042.Tristan Gingold2019-11-282-0/+37
* synth-static_oper: handle floating point comparisons. Fix #1042Tristan Gingold2019-11-281-0/+19
* netlists-disp_vhdl: force conversion for mux2Tristan Gingold2019-11-281-1/+2
* doc(heartbeat): fix position of arg '--wave' (#1040)1138-4EB2019-11-281-1/+1
* testsuite: add case for #1036Tristan Gingold2019-11-282-0/+28
* synth: factorize code, move value2logvec to synth-expr.Tristan Gingold2019-11-284-196/+116
* netlists: use C convention to pass records.Tristan Gingold2019-11-281-0/+4
* netlists: remove port API (make it easier to interface).Tristan Gingold2019-11-286-130/+165
* netlists: remove port_inout.Tristan Gingold2019-11-285-25/+10
* synth: rework the sname API.Tristan Gingold2019-11-288-101/+129
* netlists: add Get_Design.Tristan Gingold2019-11-282-0/+8
generated by cgit v1.2.3 (git 2.25.1) at 2025-02-05 13:04:50 +0000