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* vhdl: recognize numeric_bit.to_unsignedTristan Gingold2022-05-315-225/+283
* synth-vhdl_stmts: do not convert out variable on callTristan Gingold2022-05-311-3/+8
* synth-vhdl_stmts: export Synth_Subprogram_Back_AssociationTristan Gingold2022-05-312-7/+15
* synth-vhdl_static_proc: handle write_realTristan Gingold2022-05-311-0/+32
* synth-vhdl_eval: handle more operations (to_string, match)Tristan Gingold2022-05-312-23/+229
* doc: update links to Yosys website (#2069)Xiretza2022-05-312-5/+5
* Merge pull request #2067 from sudden6/fix_configuretgingold2022-05-311-1/+1
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| * use --version flag to check for C compilersudden62022-05-301-1/+1
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* synth-vhdl_eval: handle more operatorsTristan Gingold2022-05-303-26/+402
* synth-vhdl_static_proc: add hook for std.env.finishTristan Gingold2022-05-302-0/+12
* synth-vhdl_oper: add hooks for bit edgeTristan Gingold2022-05-302-0/+15
* vhdl-nodes: move maximum/minimum out of predefined operator rangeTristan Gingold2022-05-304-211/+214
* elab-vhdl_objtypes: bit and logic types also have a rangeTristan Gingold2022-05-302-6/+13
* synth-vhdl_eval: handle more operationsTristan Gingold2022-05-295-23/+219
* synth-vhdl_eval: handle resolution_limitTristan Gingold2022-05-291-0/+3
* vhdl: recognize subprograms from std.envTristan Gingold2022-05-295-484/+587
* std_names: add names from std.envTristan Gingold2022-05-293-374/+387
* elab-debugger: export more subprogramsTristan Gingold2022-05-291-0/+6
* ghdlsimul: use assertion level from command lineTristan Gingold2022-05-291-0/+2
* synth-vhdl_stmts: export two procedures, adjust assertion messageTristan Gingold2022-05-292-5/+10
* synth-vhdl_oper: add hook for falling edge, handle aliases.Tristan Gingold2022-05-293-3/+13
* synth-vhdl_eval: handle more operationsTristan Gingold2022-05-291-0/+30
* elab-vhdl_objtypes: add unshare with areapoolTristan Gingold2022-05-292-0/+13
* synth: handle suspend state declaration and statementTristan Gingold2022-05-272-0/+16
* ghdlsimul: initial stop is after elaborationTristan Gingold2022-05-271-8/+1
* elab-debugger: add Debug_TimeTristan Gingold2022-05-272-1/+16
* elab-vhdl_debug: handle records in disp_memtyp.Tristan Gingold2022-05-272-4/+32
* elab-vhdl_objtypes: add Create_Memory_U32 (for states)Tristan Gingold2022-05-272-3/+19
* utils_io: add put_addr (to display addresses)Tristan Gingold2022-05-272-0/+24
* vhdl-canon: add Canon_Add_Suspend_StateTristan Gingold2022-05-2613-199/+574
* synth: move procedure call copyback values in contextTristan Gingold2022-05-253-79/+82
* vhdl-annotations: annotate procedure call associationsTristan Gingold2022-05-251-14/+47
* vhdl: move Is_Copyback_Parameter to vhdl-utilsTristan Gingold2022-05-253-12/+16
* synth: add value_dyn_alias in elab-vhdl_valuesTristan Gingold2022-05-258-72/+203
* elab-vhdl_objtypes: use value_offsets for record elements offset.Tristan Gingold2022-05-2412-56/+52
* synth-vhdl_stmts: minor refactoringTristan Gingold2022-05-241-12/+23
* synth-vhdl_eval: handle element-element concatenationTristan Gingold2022-05-241-0/+18
* elab-vhdl_values-debug: slightly improve outputTristan Gingold2022-05-241-2/+6
* testsuite/synth: add a commentsTristan Gingold2022-05-231-0/+2
* synth-vhdl_stmts: rework synth_subprogram_associationTristan Gingold2022-05-231-35/+35
* synth-vhdl_oper: add an hook for rising_edgeTristan Gingold2022-05-233-4/+13
* elab-vhdl_objtypes: replace Is_Synth by WkindTristan Gingold2022-05-223-23/+40
* synth: use same elements for unbounded arrays and vectorsTristan Gingold2022-05-229-70/+36
* synth: also use one-dimensional unbounded arrays for objtypesTristan Gingold2022-05-226-58/+66
* synth: merge value for type_vector and type_arrayTristan Gingold2022-05-2215-137/+113
* elab-vhdl_values-debug: improve debug_typ outputTristan Gingold2022-05-221-14/+37
* synth: use unidimentional arrays in type_acc. Factorize code.Tristan Gingold2022-05-2217-552/+340
* synth-vhdl_stmts: write generic procedure Assign_Aggregate.Tristan Gingold2022-05-212-14/+29
* synth-vhdl_expr: avoid a memocy copyTristan Gingold2022-05-211-3/+7
* vhdl-canon: remove unused canon_flag_inertial_associationsTristan Gingold2022-05-203-9/+0
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