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* testsuite/synth: add a test for static values.Tristan Gingold2019-11-123-0/+65
* synth-stmts: improve support of consts inTristan Gingold2019-11-121-0/+2
* synth-stmts: return sub arrays/records forTristan Gingold2019-11-123-10/+16
* synth-oper: handle const substraction.Tristan Gingold2019-11-121-2/+2
* testsuite/synth: add tests for previous commit.Tristan Gingold2019-11-123-0/+64
* netlists: initial support of net of width 0.Tristan Gingold2019-11-122-3/+0
* synth-stmts: better support of constants (indexed andTristan Gingold2019-11-121-5/+36
* synth-oper: handle constant values for to_unsigned.Tristan Gingold2019-11-121-1/+3
* synth-insts: add support for unbounded ports.Tristan Gingold2019-11-121-4/+51
* synth-environment: fix links and counts inTristan Gingold2019-11-121-0/+3
* synth-disp_vhdl: handle arrays for in-converters.Tristan Gingold2019-11-121-1/+20
* netlists-memories: do not crash on anonymous ROM.Tristan Gingold2019-11-121-3/+6
* synth-expr: reshape: handle consts.Tristan Gingold2019-11-121-0/+2
* testsuite/synth: add tests for individual associations.Tristan Gingold2019-11-128-0/+185
* synth-insts: add support for individual associations.Tristan Gingold2019-11-121-34/+243
* synth: file support (WIP).Tristan Gingold2019-11-123-4/+7
* doc: add '.. program:: ghdl' directive (#1017)1138-4EB2019-11-1211-1/+12
* ghdldrv: adjust after change in Dyn_Tables. Fix breakage.Tristan Gingold2019-11-111-6/+5
* netlists-gates: add comments.Tristan Gingold2019-11-111-0/+3
* netlists-dump: display ports name.Tristan Gingold2019-11-112-12/+29
* netlists: optimize trunc.Tristan Gingold2019-11-114-8/+64
* synth: simplify equality tests.Tristan Gingold2019-11-111-2/+3
* netlists: expand dyn_insert_enTristan Gingold2019-11-112-4/+18
* testsuite/synth: add a test for previous commit.Tristan Gingold2019-11-113-1/+75
* netlists-expands: handle gaps.Tristan Gingold2019-11-111-12/+12
* netlists: add more support for dyn_insert_enTristan Gingold2019-11-113-6/+21
* netlists: add dyn_insert_en gate.Tristan Gingold2019-11-114-50/+95
* testsuite/synth: add an incorrectly handled dff.Tristan Gingold2019-11-113-1/+74
* synth: merge partial assignments before merging phis.Tristan Gingold2019-11-112-1/+57
* synth-decls: Only emit unused warnings on signals (andTristan Gingold2019-11-111-4/+8
* dyn_tables: move Table_Initial generic to argument ofTristan Gingold2019-11-1112-21/+20
* synth: move net_table to netlists-utils.Tristan Gingold2019-11-113-13/+14
* netlists: add 2 flags per instance, including a mark flag.Tristan Gingold2019-11-112-6/+33
* synth: initial support for file types. For #1004Tristan Gingold2019-11-115-33/+105
* synth: initial support of access type. For #1004Tristan Gingold2019-11-115-4/+76
* Update doc (#1003)1138-4EB2019-11-1136-856/+1011
* synth-decls: handle unassigned signal/object. For issue 65Tristan Gingold2019-11-073-14/+53
* testsuite/synth: add testcase for or short-circuit. #1005Tristan Gingold2019-11-072-3/+28
* synth: also handle or short-circuit. For #1005Tristan Gingold2019-11-071-14/+35
* Makefile.in: adjust libghdl name on windows. For #1010Tristan Gingold2019-11-071-0/+6
* Add testcase for #1011Tristan Gingold2019-11-062-0/+40
* synth: handle record assignment for variables. Fix #1011Tristan Gingold2019-11-061-0/+4
* Add testcase for #1005Tristan Gingold2019-11-062-0/+34
* synth: handle short-circuit and. Fix #1005Tristan Gingold2019-11-061-9/+38
* files_map-editor: add Copy_Source_File.Tristan Gingold2019-11-063-0/+46
* files_map: add Discard_Source_File, Free_Source_File,Tristan Gingold2019-11-063-5/+47
* files_map-editor: turn Replace_Text to a function.Tristan Gingold2019-11-063-30/+39
* vhdl-ieee-std_logic_1164: minor simplification.Tristan Gingold2019-11-061-21/+8
* synth: handle edge operators in synth_predefined_function_call.Tristan Gingold2019-11-064-31/+24
* vhdl: recognize rising_edge/falling_edge.Tristan Gingold2019-11-064-381/+393
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