aboutsummaryrefslogtreecommitdiffstats
path: root/src
diff options
context:
space:
mode:
authorTristan Gingold <tgingold@free.fr>2022-05-30 04:11:42 +0200
committerTristan Gingold <tgingold@free.fr>2022-05-30 04:11:42 +0200
commitc36104e1e61f07732a6fe77edec3b51f044b9dfe (patch)
tree6a78e6057164ee25542dd6e2f7889a21641e61f6 /src
parentf17aa58396cfd5c1851d9ff6f2a16a3dd0e44cc9 (diff)
downloadghdl-c36104e1e61f07732a6fe77edec3b51f044b9dfe.tar.gz
ghdl-c36104e1e61f07732a6fe77edec3b51f044b9dfe.tar.bz2
ghdl-c36104e1e61f07732a6fe77edec3b51f044b9dfe.zip
vhdl-nodes: move maximum/minimum out of predefined operator range
Diffstat (limited to 'src')
-rw-r--r--src/synth/synth-vhdl_eval.adb38
-rw-r--r--src/synth/synth-vhdl_oper.adb39
-rw-r--r--src/vhdl/vhdl-nodes.ads54
3 files changed, 67 insertions, 64 deletions
diff --git a/src/synth/synth-vhdl_eval.adb b/src/synth/synth-vhdl_eval.adb
index 5efb1846a..aef98b807 100644
--- a/src/synth/synth-vhdl_eval.adb
+++ b/src/synth/synth-vhdl_eval.adb
@@ -328,25 +328,6 @@ package body Synth.Vhdl_Eval is
(Read_Discrete (Left) ** Natural (Read_Discrete (Right)),
Res_Typ);
- when Iir_Predefined_Physical_Minimum
- | Iir_Predefined_Integer_Minimum
- | Iir_Predefined_Enum_Minimum =>
- return Create_Memory_Discrete
- (Int64'Min (Read_Discrete (Left), Read_Discrete (Right)),
- Res_Typ);
- when Iir_Predefined_Floating_Maximum =>
- return Create_Memory_Fp64
- (Fp64'Max (Read_Fp64 (Left), Read_Fp64 (Right)), Res_Typ);
- when Iir_Predefined_Physical_Maximum
- | Iir_Predefined_Integer_Maximum
- | Iir_Predefined_Enum_Maximum =>
- return Create_Memory_Discrete
- (Int64'Max (Read_Discrete (Left), Read_Discrete (Right)),
- Res_Typ);
- when Iir_Predefined_Floating_Minimum =>
- return Create_Memory_Fp64
- (Fp64'Min (Read_Fp64 (Left), Read_Fp64 (Right)), Res_Typ);
-
when Iir_Predefined_Integer_Less_Equal
| Iir_Predefined_Physical_Less_Equal
| Iir_Predefined_Enum_Less_Equal =>
@@ -1092,6 +1073,25 @@ package body Synth.Vhdl_Eval is
Get_Implicit_Definition (Imp);
begin
case Def is
+ when Iir_Predefined_Physical_Minimum
+ | Iir_Predefined_Integer_Minimum
+ | Iir_Predefined_Enum_Minimum =>
+ return Create_Memory_Discrete
+ (Int64'Min (Read_Discrete (Param1), Read_Discrete (Param2)),
+ Res_Typ);
+ when Iir_Predefined_Floating_Maximum =>
+ return Create_Memory_Fp64
+ (Fp64'Max (Read_Fp64 (Param1), Read_Fp64 (Param2)), Res_Typ);
+ when Iir_Predefined_Physical_Maximum
+ | Iir_Predefined_Integer_Maximum
+ | Iir_Predefined_Enum_Maximum =>
+ return Create_Memory_Discrete
+ (Int64'Max (Read_Discrete (Param1), Read_Discrete (Param2)),
+ Res_Typ);
+ when Iir_Predefined_Floating_Minimum =>
+ return Create_Memory_Fp64
+ (Fp64'Min (Read_Fp64 (Param1), Read_Fp64 (Param2)), Res_Typ);
+
when Iir_Predefined_Endfile =>
declare
Res : Boolean;
diff --git a/src/synth/synth-vhdl_oper.adb b/src/synth/synth-vhdl_oper.adb
index 4854f554a..0f25e63da 100644
--- a/src/synth/synth-vhdl_oper.adb
+++ b/src/synth/synth-vhdl_oper.adb
@@ -461,20 +461,6 @@ package body Synth.Vhdl_Oper is
return Create_Value_Net (N, Res_Type);
end Synth_Compare;
- function Synth_Minmax (Id : Compare_Module_Id) return Valtyp
- is
- L : constant Net := Get_Net (Ctxt, Left);
- R : constant Net := Get_Net (Ctxt, Right);
- Sel, N : Net;
- begin
- pragma Assert (Left_Type = Right_Type);
- Sel := Build2_Compare (Ctxt, Id, L, R);
- Set_Location (Sel, Expr);
- N := Build_Mux2 (Ctxt, Sel, R, L);
- Set_Location (N, Expr);
- return Create_Value_Net (N, Expr_Typ);
- end Synth_Minmax;
-
function Synth_Compare_Array (Id : Compare_Module_Id;
Res_Type : Type_Acc) return Valtyp
is
@@ -1088,10 +1074,6 @@ package body Synth.Vhdl_Oper is
return Synth_Compare (Id_Eq, Boolean_Type);
when Iir_Predefined_Integer_Inequality =>
return Synth_Compare (Id_Ne, Boolean_Type);
- when Iir_Predefined_Integer_Minimum =>
- return Synth_Minmax (Id_Slt);
- when Iir_Predefined_Integer_Maximum =>
- return Synth_Minmax (Id_Sgt);
when Iir_Predefined_Physical_Physical_Div =>
Error_Msg_Synth (+Expr, "non-constant division not supported");
return No_Valtyp;
@@ -1865,6 +1847,23 @@ package body Synth.Vhdl_Oper is
(N, Create_Vec_Type_By_Length (Size, Logic_Type));
end Synth_Resize;
+ function Synth_Minmax (Ctxt : Context_Acc;
+ Left, Right : Valtyp;
+ Res_Typ : Type_Acc;
+ Id : Compare_Module_Id;
+ Expr : Node) return Valtyp
+ is
+ L : constant Net := Get_Net (Ctxt, Left);
+ R : constant Net := Get_Net (Ctxt, Right);
+ Sel, N : Net;
+ begin
+ Sel := Build2_Compare (Ctxt, Id, L, R);
+ Set_Location (Sel, Expr);
+ N := Build_Mux2 (Ctxt, Sel, R, L);
+ Set_Location (N, Expr);
+ return Create_Value_Net (N, Res_Typ);
+ end Synth_Minmax;
+
function Synth_Dynamic_Predefined_Function_Call
(Subprg_Inst : Synth_Instance_Acc; Expr : Node) return Valtyp
is
@@ -1914,6 +1913,10 @@ package body Synth.Vhdl_Oper is
end if;
case Def is
+ when Iir_Predefined_Integer_Minimum =>
+ return Synth_Minmax (Ctxt, L, R, Res_Typ, Id_Slt, Expr);
+ when Iir_Predefined_Integer_Maximum =>
+ return Synth_Minmax (Ctxt, L, R, Res_Typ, Id_Sgt, Expr);
when Iir_Predefined_Ieee_1164_Rising_Edge =>
if Hook_Std_Rising_Edge /= null then
return Create_Value_Memtyp
diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads
index 83c352479..df51efb68 100644
--- a/src/vhdl/vhdl-nodes.ads
+++ b/src/vhdl/vhdl-nodes.ads
@@ -5319,11 +5319,6 @@ package Vhdl.Nodes is
Iir_Predefined_Enum_Greater,
Iir_Predefined_Enum_Greater_Equal,
- -- LRM08 5.2.6 Predefined operations on scalar types.
- Iir_Predefined_Enum_Minimum,
- Iir_Predefined_Enum_Maximum,
- Iir_Predefined_Enum_To_String,
-
-- Predefined operators for BIT type.
-- LRM08 9.2.2 Logical Operators
@@ -5346,10 +5341,6 @@ package Vhdl.Nodes is
-- LRM08 9.2.9 Condition operator
Iir_Predefined_Bit_Condition,
- -- LRM08 5.2.6 Predefined operations on scalar types.
- Iir_Predefined_Bit_Rising_Edge,
- Iir_Predefined_Bit_Falling_Edge,
-
-- Predefined operators for any integer type.
-- LRM08 9.2.3 Relational Operators
@@ -5380,11 +5371,6 @@ package Vhdl.Nodes is
-- LRM08 9.2.8 Miscellaneous operators
Iir_Predefined_Integer_Exp,
- -- LRM08 5.2.6 Predefined operations on scalar types.
- Iir_Predefined_Integer_Minimum,
- Iir_Predefined_Integer_Maximum,
- Iir_Predefined_Integer_To_String,
-
-- Predefined operators for any floating type.
-- LRM08 9.2.3 Relational Operators
@@ -5413,13 +5399,6 @@ package Vhdl.Nodes is
-- LRM08 9.2.8 Miscellaneous operators
Iir_Predefined_Floating_Exp,
- -- LRM08 5.2.6 Predefined operations on scalar types.
- Iir_Predefined_Floating_Minimum,
- Iir_Predefined_Floating_Maximum,
- Iir_Predefined_Floating_To_String,
- Iir_Predefined_Real_To_String_Digits,
- Iir_Predefined_Real_To_String_Format,
-
-- Predefined operator for universal types.
-- LRM08 9.2.7 Multiplying operators
@@ -5459,12 +5438,6 @@ package Vhdl.Nodes is
Iir_Predefined_Physical_Mod,
Iir_Predefined_Physical_Rem,
- -- LRM08 5.2.6 Predefined operations on scalar types.
- Iir_Predefined_Physical_Minimum,
- Iir_Predefined_Physical_Maximum,
- Iir_Predefined_Physical_To_String,
- Iir_Predefined_Time_To_String_Unit,
-
-- Predefined operators for access.
-- LRM08 9.2.3 Relational Operators
@@ -5560,6 +5533,33 @@ package Vhdl.Nodes is
Iir_Predefined_Std_Ulogic_Array_Match_Equality,
Iir_Predefined_Std_Ulogic_Array_Match_Inequality,
+ -- LRM08 5.2.6 Predefined operations on scalar types.
+ Iir_Predefined_Enum_Minimum,
+ Iir_Predefined_Enum_Maximum,
+ Iir_Predefined_Enum_To_String,
+
+ -- LRM08 5.2.6 Predefined operations on scalar types.
+ Iir_Predefined_Integer_Minimum,
+ Iir_Predefined_Integer_Maximum,
+ Iir_Predefined_Integer_To_String,
+
+ -- LRM08 5.2.6 Predefined operations on scalar types.
+ Iir_Predefined_Bit_Rising_Edge,
+ Iir_Predefined_Bit_Falling_Edge,
+
+ -- LRM08 5.2.6 Predefined operations on scalar types.
+ Iir_Predefined_Floating_Minimum,
+ Iir_Predefined_Floating_Maximum,
+ Iir_Predefined_Floating_To_String,
+ Iir_Predefined_Real_To_String_Digits,
+ Iir_Predefined_Real_To_String_Format,
+
+ -- LRM08 5.2.6 Predefined operations on scalar types.
+ Iir_Predefined_Physical_Minimum,
+ Iir_Predefined_Physical_Maximum,
+ Iir_Predefined_Physical_To_String,
+ Iir_Predefined_Time_To_String_Unit,
+
-- LRM08 5.3.2.4 Predefined operations on array types
Iir_Predefined_Array_Char_To_String,
Iir_Predefined_Bit_Vector_To_Ostring,