diff options
| -rw-r--r-- | pyGHDL/libghdl/vhdl/nodes.py | 294 | ||||
| -rw-r--r-- | src/synth/synth-vhdl_eval.adb | 38 | ||||
| -rw-r--r-- | src/synth/synth-vhdl_oper.adb | 39 | ||||
| -rw-r--r-- | src/vhdl/vhdl-nodes.ads | 54 |
4 files changed, 214 insertions, 211 deletions
diff --git a/pyGHDL/libghdl/vhdl/nodes.py b/pyGHDL/libghdl/vhdl/nodes.py index 9ec358425..70be92f3f 100644 --- a/pyGHDL/libghdl/vhdl/nodes.py +++ b/pyGHDL/libghdl/vhdl/nodes.py @@ -1210,153 +1210,153 @@ class Iir_Predefined(IntEnum): Enum_Less_Equal = 13 Enum_Greater = 14 Enum_Greater_Equal = 15 - Enum_Minimum = 16 - Enum_Maximum = 17 - Enum_To_String = 18 - Bit_And = 19 - Bit_Or = 20 - Bit_Nand = 21 - Bit_Nor = 22 - Bit_Xor = 23 - Bit_Xnor = 24 - Bit_Not = 25 - Bit_Match_Equality = 26 - Bit_Match_Inequality = 27 - Bit_Match_Less = 28 - Bit_Match_Less_Equal = 29 - Bit_Match_Greater = 30 - Bit_Match_Greater_Equal = 31 - Bit_Condition = 32 - Bit_Rising_Edge = 33 - Bit_Falling_Edge = 34 - Integer_Equality = 35 - Integer_Inequality = 36 - Integer_Less = 37 - Integer_Less_Equal = 38 - Integer_Greater = 39 - Integer_Greater_Equal = 40 - Integer_Identity = 41 - Integer_Negation = 42 - Integer_Absolute = 43 - Integer_Plus = 44 - Integer_Minus = 45 - Integer_Mul = 46 - Integer_Div = 47 - Integer_Mod = 48 - Integer_Rem = 49 - Integer_Exp = 50 - Integer_Minimum = 51 - Integer_Maximum = 52 - Integer_To_String = 53 - Floating_Equality = 54 - Floating_Inequality = 55 - Floating_Less = 56 - Floating_Less_Equal = 57 - Floating_Greater = 58 - Floating_Greater_Equal = 59 - Floating_Identity = 60 - Floating_Negation = 61 - Floating_Absolute = 62 - Floating_Plus = 63 - Floating_Minus = 64 - Floating_Mul = 65 - Floating_Div = 66 - Floating_Exp = 67 - Floating_Minimum = 68 - Floating_Maximum = 69 - Floating_To_String = 70 - Real_To_String_Digits = 71 - Real_To_String_Format = 72 - Universal_R_I_Mul = 73 - Universal_I_R_Mul = 74 - Universal_R_I_Div = 75 - Physical_Equality = 76 - Physical_Inequality = 77 - Physical_Less = 78 - Physical_Less_Equal = 79 - Physical_Greater = 80 - Physical_Greater_Equal = 81 - Physical_Identity = 82 - Physical_Negation = 83 - Physical_Absolute = 84 - Physical_Plus = 85 - Physical_Minus = 86 - Physical_Integer_Mul = 87 - Physical_Real_Mul = 88 - Integer_Physical_Mul = 89 - Real_Physical_Mul = 90 - Physical_Integer_Div = 91 - Physical_Real_Div = 92 - Physical_Physical_Div = 93 - Physical_Mod = 94 - Physical_Rem = 95 - Physical_Minimum = 96 - Physical_Maximum = 97 - Physical_To_String = 98 - Time_To_String_Unit = 99 - Access_Equality = 100 - Access_Inequality = 101 - Record_Equality = 102 - Record_Inequality = 103 - Array_Equality = 104 - Array_Inequality = 105 - Array_Less = 106 - Array_Less_Equal = 107 - Array_Greater = 108 - Array_Greater_Equal = 109 - Array_Array_Concat = 110 - Array_Element_Concat = 111 - Element_Array_Concat = 112 - Element_Element_Concat = 113 - Array_Minimum = 114 - Array_Maximum = 115 - Vector_Minimum = 116 - Vector_Maximum = 117 - Array_Sll = 118 - Array_Srl = 119 - Array_Sla = 120 - Array_Sra = 121 - Array_Rol = 122 - Array_Ror = 123 - TF_Array_And = 124 - TF_Array_Or = 125 - TF_Array_Nand = 126 - TF_Array_Nor = 127 - TF_Array_Xor = 128 - TF_Array_Xnor = 129 - TF_Array_Not = 130 - TF_Reduction_And = 131 - TF_Reduction_Or = 132 - TF_Reduction_Nand = 133 - TF_Reduction_Nor = 134 - TF_Reduction_Xor = 135 - TF_Reduction_Xnor = 136 - TF_Reduction_Not = 137 - TF_Array_Element_And = 138 - TF_Element_Array_And = 139 - TF_Array_Element_Or = 140 - TF_Element_Array_Or = 141 - TF_Array_Element_Nand = 142 - TF_Element_Array_Nand = 143 - TF_Array_Element_Nor = 144 - TF_Element_Array_Nor = 145 - TF_Array_Element_Xor = 146 - TF_Element_Array_Xor = 147 - TF_Array_Element_Xnor = 148 - TF_Element_Array_Xnor = 149 - Bit_Array_Match_Equality = 150 - Bit_Array_Match_Inequality = 151 - Array_Char_To_String = 152 - Bit_Vector_To_Ostring = 153 - Bit_Vector_To_Hstring = 154 - Std_Ulogic_Match_Equality = 155 - Std_Ulogic_Match_Inequality = 156 - Std_Ulogic_Match_Less = 157 - Std_Ulogic_Match_Less_Equal = 158 - Std_Ulogic_Match_Greater = 159 - Std_Ulogic_Match_Greater_Equal = 160 - Std_Ulogic_Array_Match_Equality = 161 - Std_Ulogic_Array_Match_Inequality = 162 + Bit_And = 16 + Bit_Or = 17 + Bit_Nand = 18 + Bit_Nor = 19 + Bit_Xor = 20 + Bit_Xnor = 21 + Bit_Not = 22 + Bit_Match_Equality = 23 + Bit_Match_Inequality = 24 + Bit_Match_Less = 25 + Bit_Match_Less_Equal = 26 + Bit_Match_Greater = 27 + Bit_Match_Greater_Equal = 28 + Bit_Condition = 29 + Integer_Equality = 30 + Integer_Inequality = 31 + Integer_Less = 32 + Integer_Less_Equal = 33 + Integer_Greater = 34 + Integer_Greater_Equal = 35 + Integer_Identity = 36 + Integer_Negation = 37 + Integer_Absolute = 38 + Integer_Plus = 39 + Integer_Minus = 40 + Integer_Mul = 41 + Integer_Div = 42 + Integer_Mod = 43 + Integer_Rem = 44 + Integer_Exp = 45 + Floating_Equality = 46 + Floating_Inequality = 47 + Floating_Less = 48 + Floating_Less_Equal = 49 + Floating_Greater = 50 + Floating_Greater_Equal = 51 + Floating_Identity = 52 + Floating_Negation = 53 + Floating_Absolute = 54 + Floating_Plus = 55 + Floating_Minus = 56 + Floating_Mul = 57 + Floating_Div = 58 + Floating_Exp = 59 + Universal_R_I_Mul = 60 + Universal_I_R_Mul = 61 + Universal_R_I_Div = 62 + Physical_Equality = 63 + Physical_Inequality = 64 + Physical_Less = 65 + Physical_Less_Equal = 66 + Physical_Greater = 67 + Physical_Greater_Equal = 68 + Physical_Identity = 69 + Physical_Negation = 70 + Physical_Absolute = 71 + Physical_Plus = 72 + Physical_Minus = 73 + Physical_Integer_Mul = 74 + Physical_Real_Mul = 75 + Integer_Physical_Mul = 76 + Real_Physical_Mul = 77 + Physical_Integer_Div = 78 + Physical_Real_Div = 79 + Physical_Physical_Div = 80 + Physical_Mod = 81 + Physical_Rem = 82 + Access_Equality = 83 + Access_Inequality = 84 + Record_Equality = 85 + Record_Inequality = 86 + Array_Equality = 87 + Array_Inequality = 88 + Array_Less = 89 + Array_Less_Equal = 90 + Array_Greater = 91 + Array_Greater_Equal = 92 + Array_Array_Concat = 93 + Array_Element_Concat = 94 + Element_Array_Concat = 95 + Element_Element_Concat = 96 + Array_Minimum = 97 + Array_Maximum = 98 + Vector_Minimum = 99 + Vector_Maximum = 100 + Array_Sll = 101 + Array_Srl = 102 + Array_Sla = 103 + Array_Sra = 104 + Array_Rol = 105 + Array_Ror = 106 + TF_Array_And = 107 + TF_Array_Or = 108 + TF_Array_Nand = 109 + TF_Array_Nor = 110 + TF_Array_Xor = 111 + TF_Array_Xnor = 112 + TF_Array_Not = 113 + TF_Reduction_And = 114 + TF_Reduction_Or = 115 + TF_Reduction_Nand = 116 + TF_Reduction_Nor = 117 + TF_Reduction_Xor = 118 + TF_Reduction_Xnor = 119 + TF_Reduction_Not = 120 + TF_Array_Element_And = 121 + TF_Element_Array_And = 122 + TF_Array_Element_Or = 123 + TF_Element_Array_Or = 124 + TF_Array_Element_Nand = 125 + TF_Element_Array_Nand = 126 + TF_Array_Element_Nor = 127 + TF_Element_Array_Nor = 128 + TF_Array_Element_Xor = 129 + TF_Element_Array_Xor = 130 + TF_Array_Element_Xnor = 131 + TF_Element_Array_Xnor = 132 + Bit_Array_Match_Equality = 133 + Bit_Array_Match_Inequality = 134 + Std_Ulogic_Match_Equality = 135 + Std_Ulogic_Match_Inequality = 136 + Std_Ulogic_Match_Less = 137 + Std_Ulogic_Match_Less_Equal = 138 + Std_Ulogic_Match_Greater = 139 + Std_Ulogic_Match_Greater_Equal = 140 + Std_Ulogic_Array_Match_Equality = 141 + Std_Ulogic_Array_Match_Inequality = 142 + Enum_Minimum = 143 + Enum_Maximum = 144 + Enum_To_String = 145 + Integer_Minimum = 146 + Integer_Maximum = 147 + Integer_To_String = 148 + Bit_Rising_Edge = 149 + Bit_Falling_Edge = 150 + Floating_Minimum = 151 + Floating_Maximum = 152 + Floating_To_String = 153 + Real_To_String_Digits = 154 + Real_To_String_Format = 155 + Physical_Minimum = 156 + Physical_Maximum = 157 + Physical_To_String = 158 + Time_To_String_Unit = 159 + Array_Char_To_String = 160 + Bit_Vector_To_Ostring = 161 + Bit_Vector_To_Hstring = 162 Deallocate = 163 File_Open = 164 File_Open_Status = 165 diff --git a/src/synth/synth-vhdl_eval.adb b/src/synth/synth-vhdl_eval.adb index 5efb1846a..aef98b807 100644 --- a/src/synth/synth-vhdl_eval.adb +++ b/src/synth/synth-vhdl_eval.adb @@ -328,25 +328,6 @@ package body Synth.Vhdl_Eval is (Read_Discrete (Left) ** Natural (Read_Discrete (Right)), Res_Typ); - when Iir_Predefined_Physical_Minimum - | Iir_Predefined_Integer_Minimum - | Iir_Predefined_Enum_Minimum => - return Create_Memory_Discrete - (Int64'Min (Read_Discrete (Left), Read_Discrete (Right)), - Res_Typ); - when Iir_Predefined_Floating_Maximum => - return Create_Memory_Fp64 - (Fp64'Max (Read_Fp64 (Left), Read_Fp64 (Right)), Res_Typ); - when Iir_Predefined_Physical_Maximum - | Iir_Predefined_Integer_Maximum - | Iir_Predefined_Enum_Maximum => - return Create_Memory_Discrete - (Int64'Max (Read_Discrete (Left), Read_Discrete (Right)), - Res_Typ); - when Iir_Predefined_Floating_Minimum => - return Create_Memory_Fp64 - (Fp64'Min (Read_Fp64 (Left), Read_Fp64 (Right)), Res_Typ); - when Iir_Predefined_Integer_Less_Equal | Iir_Predefined_Physical_Less_Equal | Iir_Predefined_Enum_Less_Equal => @@ -1092,6 +1073,25 @@ package body Synth.Vhdl_Eval is Get_Implicit_Definition (Imp); begin case Def is + when Iir_Predefined_Physical_Minimum + | Iir_Predefined_Integer_Minimum + | Iir_Predefined_Enum_Minimum => + return Create_Memory_Discrete + (Int64'Min (Read_Discrete (Param1), Read_Discrete (Param2)), + Res_Typ); + when Iir_Predefined_Floating_Maximum => + return Create_Memory_Fp64 + (Fp64'Max (Read_Fp64 (Param1), Read_Fp64 (Param2)), Res_Typ); + when Iir_Predefined_Physical_Maximum + | Iir_Predefined_Integer_Maximum + | Iir_Predefined_Enum_Maximum => + return Create_Memory_Discrete + (Int64'Max (Read_Discrete (Param1), Read_Discrete (Param2)), + Res_Typ); + when Iir_Predefined_Floating_Minimum => + return Create_Memory_Fp64 + (Fp64'Min (Read_Fp64 (Param1), Read_Fp64 (Param2)), Res_Typ); + when Iir_Predefined_Endfile => declare Res : Boolean; diff --git a/src/synth/synth-vhdl_oper.adb b/src/synth/synth-vhdl_oper.adb index 4854f554a..0f25e63da 100644 --- a/src/synth/synth-vhdl_oper.adb +++ b/src/synth/synth-vhdl_oper.adb @@ -461,20 +461,6 @@ package body Synth.Vhdl_Oper is return Create_Value_Net (N, Res_Type); end Synth_Compare; - function Synth_Minmax (Id : Compare_Module_Id) return Valtyp - is - L : constant Net := Get_Net (Ctxt, Left); - R : constant Net := Get_Net (Ctxt, Right); - Sel, N : Net; - begin - pragma Assert (Left_Type = Right_Type); - Sel := Build2_Compare (Ctxt, Id, L, R); - Set_Location (Sel, Expr); - N := Build_Mux2 (Ctxt, Sel, R, L); - Set_Location (N, Expr); - return Create_Value_Net (N, Expr_Typ); - end Synth_Minmax; - function Synth_Compare_Array (Id : Compare_Module_Id; Res_Type : Type_Acc) return Valtyp is @@ -1088,10 +1074,6 @@ package body Synth.Vhdl_Oper is return Synth_Compare (Id_Eq, Boolean_Type); when Iir_Predefined_Integer_Inequality => return Synth_Compare (Id_Ne, Boolean_Type); - when Iir_Predefined_Integer_Minimum => - return Synth_Minmax (Id_Slt); - when Iir_Predefined_Integer_Maximum => - return Synth_Minmax (Id_Sgt); when Iir_Predefined_Physical_Physical_Div => Error_Msg_Synth (+Expr, "non-constant division not supported"); return No_Valtyp; @@ -1865,6 +1847,23 @@ package body Synth.Vhdl_Oper is (N, Create_Vec_Type_By_Length (Size, Logic_Type)); end Synth_Resize; + function Synth_Minmax (Ctxt : Context_Acc; + Left, Right : Valtyp; + Res_Typ : Type_Acc; + Id : Compare_Module_Id; + Expr : Node) return Valtyp + is + L : constant Net := Get_Net (Ctxt, Left); + R : constant Net := Get_Net (Ctxt, Right); + Sel, N : Net; + begin + Sel := Build2_Compare (Ctxt, Id, L, R); + Set_Location (Sel, Expr); + N := Build_Mux2 (Ctxt, Sel, R, L); + Set_Location (N, Expr); + return Create_Value_Net (N, Res_Typ); + end Synth_Minmax; + function Synth_Dynamic_Predefined_Function_Call (Subprg_Inst : Synth_Instance_Acc; Expr : Node) return Valtyp is @@ -1914,6 +1913,10 @@ package body Synth.Vhdl_Oper is end if; case Def is + when Iir_Predefined_Integer_Minimum => + return Synth_Minmax (Ctxt, L, R, Res_Typ, Id_Slt, Expr); + when Iir_Predefined_Integer_Maximum => + return Synth_Minmax (Ctxt, L, R, Res_Typ, Id_Sgt, Expr); when Iir_Predefined_Ieee_1164_Rising_Edge => if Hook_Std_Rising_Edge /= null then return Create_Value_Memtyp diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 83c352479..df51efb68 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -5319,11 +5319,6 @@ package Vhdl.Nodes is Iir_Predefined_Enum_Greater, Iir_Predefined_Enum_Greater_Equal, - -- LRM08 5.2.6 Predefined operations on scalar types. - Iir_Predefined_Enum_Minimum, - Iir_Predefined_Enum_Maximum, - Iir_Predefined_Enum_To_String, - -- Predefined operators for BIT type. -- LRM08 9.2.2 Logical Operators @@ -5346,10 +5341,6 @@ package Vhdl.Nodes is -- LRM08 9.2.9 Condition operator Iir_Predefined_Bit_Condition, - -- LRM08 5.2.6 Predefined operations on scalar types. - Iir_Predefined_Bit_Rising_Edge, - Iir_Predefined_Bit_Falling_Edge, - -- Predefined operators for any integer type. -- LRM08 9.2.3 Relational Operators @@ -5380,11 +5371,6 @@ package Vhdl.Nodes is -- LRM08 9.2.8 Miscellaneous operators Iir_Predefined_Integer_Exp, - -- LRM08 5.2.6 Predefined operations on scalar types. - Iir_Predefined_Integer_Minimum, - Iir_Predefined_Integer_Maximum, - Iir_Predefined_Integer_To_String, - -- Predefined operators for any floating type. -- LRM08 9.2.3 Relational Operators @@ -5413,13 +5399,6 @@ package Vhdl.Nodes is -- LRM08 9.2.8 Miscellaneous operators Iir_Predefined_Floating_Exp, - -- LRM08 5.2.6 Predefined operations on scalar types. - Iir_Predefined_Floating_Minimum, - Iir_Predefined_Floating_Maximum, - Iir_Predefined_Floating_To_String, - Iir_Predefined_Real_To_String_Digits, - Iir_Predefined_Real_To_String_Format, - -- Predefined operator for universal types. -- LRM08 9.2.7 Multiplying operators @@ -5459,12 +5438,6 @@ package Vhdl.Nodes is Iir_Predefined_Physical_Mod, Iir_Predefined_Physical_Rem, - -- LRM08 5.2.6 Predefined operations on scalar types. - Iir_Predefined_Physical_Minimum, - Iir_Predefined_Physical_Maximum, - Iir_Predefined_Physical_To_String, - Iir_Predefined_Time_To_String_Unit, - -- Predefined operators for access. -- LRM08 9.2.3 Relational Operators @@ -5560,6 +5533,33 @@ package Vhdl.Nodes is Iir_Predefined_Std_Ulogic_Array_Match_Equality, Iir_Predefined_Std_Ulogic_Array_Match_Inequality, + -- LRM08 5.2.6 Predefined operations on scalar types. + Iir_Predefined_Enum_Minimum, + Iir_Predefined_Enum_Maximum, + Iir_Predefined_Enum_To_String, + + -- LRM08 5.2.6 Predefined operations on scalar types. + Iir_Predefined_Integer_Minimum, + Iir_Predefined_Integer_Maximum, + Iir_Predefined_Integer_To_String, + + -- LRM08 5.2.6 Predefined operations on scalar types. + Iir_Predefined_Bit_Rising_Edge, + Iir_Predefined_Bit_Falling_Edge, + + -- LRM08 5.2.6 Predefined operations on scalar types. + Iir_Predefined_Floating_Minimum, + Iir_Predefined_Floating_Maximum, + Iir_Predefined_Floating_To_String, + Iir_Predefined_Real_To_String_Digits, + Iir_Predefined_Real_To_String_Format, + + -- LRM08 5.2.6 Predefined operations on scalar types. + Iir_Predefined_Physical_Minimum, + Iir_Predefined_Physical_Maximum, + Iir_Predefined_Physical_To_String, + Iir_Predefined_Time_To_String_Unit, + -- LRM08 5.3.2.4 Predefined operations on array types Iir_Predefined_Array_Char_To_String, Iir_Predefined_Bit_Vector_To_Ostring, |