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| author | Tristan Gingold <tgingold@free.fr> | 2019-10-25 20:29:37 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-10-25 20:29:37 +0200 |
| commit | 7004234586989df260a587f284f9a345142f0a01 (patch) | |
| tree | 8a25ebf78e9c9ab999cdb2b6a68b78f6046de3a2 /src/vhdl | |
| parent | 91e3a77e4ee9332eed380402cbb0f983b84c28ab (diff) | |
| download | ghdl-7004234586989df260a587f284f9a345142f0a01.tar.gz ghdl-7004234586989df260a587f284f9a345142f0a01.tar.bz2 ghdl-7004234586989df260a587f284f9a345142f0a01.zip | |
synth: handle concurrent signal assignment in vunits.
Diffstat (limited to 'src/vhdl')
| -rw-r--r-- | src/vhdl/vhdl-annotations.adb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/vhdl/vhdl-annotations.adb b/src/vhdl/vhdl-annotations.adb index 6434bb355..fe6161b50 100644 --- a/src/vhdl/vhdl-annotations.adb +++ b/src/vhdl/vhdl-annotations.adb @@ -1197,6 +1197,8 @@ package body Vhdl.Annotations is | Iir_Kind_Function_Body | Iir_Kind_Procedure_Body => Annotate_Declaration (Vunit_Info, Item); + when Iir_Kind_Concurrent_Simple_Signal_Assignment => + Annotate_Concurrent_Statement (Vunit_Info, Item); when others => Error_Kind ("annotate_vunit_declaration", Item); end case; |