From 7004234586989df260a587f284f9a345142f0a01 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Fri, 25 Oct 2019 20:29:37 +0200
Subject: synth: handle concurrent signal assignment in vunits.

---
 src/vhdl/vhdl-annotations.adb | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/vhdl')

diff --git a/src/vhdl/vhdl-annotations.adb b/src/vhdl/vhdl-annotations.adb
index 6434bb355..fe6161b50 100644
--- a/src/vhdl/vhdl-annotations.adb
+++ b/src/vhdl/vhdl-annotations.adb
@@ -1197,6 +1197,8 @@ package body Vhdl.Annotations is
               | Iir_Kind_Function_Body
               | Iir_Kind_Procedure_Body =>
                Annotate_Declaration (Vunit_Info, Item);
+            when Iir_Kind_Concurrent_Simple_Signal_Assignment =>
+               Annotate_Concurrent_Statement (Vunit_Info, Item);
             when others =>
                Error_Kind ("annotate_vunit_declaration", Item);
          end case;
-- 
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