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| author | Tristan Gingold <tgingold@free.fr> | 2019-07-04 07:29:29 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-07-04 07:29:29 +0200 |
| commit | e477ba0c50eada497760ba83474318a7e1270a7a (patch) | |
| tree | 5a37e5a2bf1694f7c565ac2cc9072f3c6e9753b4 /src/vhdl/vhdl-annotations.adb | |
| parent | cf98ab2583ddf5d1f0315f3273cc5751f8495a42 (diff) | |
| download | ghdl-e477ba0c50eada497760ba83474318a7e1270a7a.tar.gz ghdl-e477ba0c50eada497760ba83474318a7e1270a7a.tar.bz2 ghdl-e477ba0c50eada497760ba83474318a7e1270a7a.zip | |
synth: handle vhdl2008 std_logic_1164, handle anonymous_signal.
Diffstat (limited to 'src/vhdl/vhdl-annotations.adb')
| -rw-r--r-- | src/vhdl/vhdl-annotations.adb | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/vhdl/vhdl-annotations.adb b/src/vhdl/vhdl-annotations.adb index 2feba99f5..0dfe1a67a 100644 --- a/src/vhdl/vhdl-annotations.adb +++ b/src/vhdl/vhdl-annotations.adb @@ -312,6 +312,8 @@ package body Vhdl.Annotations is | Iir_Kind_Floating_Subtype_Definition | Iir_Kind_Enumeration_Subtype_Definition | Iir_Kind_Physical_Subtype_Definition => + Annotate_Anonymous_Type_Definition + (Block_Info, Get_Base_Type (Def)); El := Get_Range_Constraint (Def); if El /= Null_Iir then case Get_Kind (El) is @@ -336,8 +338,6 @@ package body Vhdl.Annotations is if Flag_Synthesis then Create_Object_Info (Block_Info, Def); end if; - Annotate_Anonymous_Type_Definition - (Block_Info, Get_Base_Type (Def)); when Iir_Kind_Integer_Type_Definition => Set_Info (Def, new Sim_Info_Type'(Kind => Kind_I64_Type, |