From e477ba0c50eada497760ba83474318a7e1270a7a Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Thu, 4 Jul 2019 07:29:29 +0200 Subject: synth: handle vhdl2008 std_logic_1164, handle anonymous_signal. --- src/vhdl/vhdl-annotations.adb | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/vhdl/vhdl-annotations.adb') diff --git a/src/vhdl/vhdl-annotations.adb b/src/vhdl/vhdl-annotations.adb index 2feba99f5..0dfe1a67a 100644 --- a/src/vhdl/vhdl-annotations.adb +++ b/src/vhdl/vhdl-annotations.adb @@ -312,6 +312,8 @@ package body Vhdl.Annotations is | Iir_Kind_Floating_Subtype_Definition | Iir_Kind_Enumeration_Subtype_Definition | Iir_Kind_Physical_Subtype_Definition => + Annotate_Anonymous_Type_Definition + (Block_Info, Get_Base_Type (Def)); El := Get_Range_Constraint (Def); if El /= Null_Iir then case Get_Kind (El) is @@ -336,8 +338,6 @@ package body Vhdl.Annotations is if Flag_Synthesis then Create_Object_Info (Block_Info, Def); end if; - Annotate_Anonymous_Type_Definition - (Block_Info, Get_Base_Type (Def)); when Iir_Kind_Integer_Type_Definition => Set_Info (Def, new Sim_Info_Type'(Kind => Kind_I64_Type, -- cgit v1.2.3