aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorTristan Gingold <tgingold@free.fr>2022-04-26 10:54:46 +0200
committerTristan Gingold <tgingold@free.fr>2022-04-27 05:07:35 +0200
commitd3953518b0f819040941303939ac48fac3d4b06f (patch)
tree5ac92f68645e80d246fe02edecbaffb9f1f133fd
parent966e54b26cafee87071539c81503918ed893cb5d (diff)
downloadghdl-d3953518b0f819040941303939ac48fac3d4b06f.tar.gz
ghdl-d3953518b0f819040941303939ac48fac3d4b06f.tar.bz2
ghdl-d3953518b0f819040941303939ac48fac3d4b06f.zip
testsuite/gna: add a test for 2008 static ieee operations
-rw-r--r--testsuite/gna/bug0131/foo.vhdl22
-rw-r--r--testsuite/gna/bug0131/numstd01.vhdl23
-rw-r--r--testsuite/gna/bug0131/numstd02.vhdl24
-rw-r--r--testsuite/gna/bug0131/slv01.vhdl22
-rwxr-xr-xtestsuite/gna/bug0131/testsuite.sh16
-rw-r--r--testsuite/gna/bug0131/to_str1.vhdl23
6 files changed, 130 insertions, 0 deletions
diff --git a/testsuite/gna/bug0131/foo.vhdl b/testsuite/gna/bug0131/foo.vhdl
new file mode 100644
index 000000000..155724d77
--- /dev/null
+++ b/testsuite/gna/bug0131/foo.vhdl
@@ -0,0 +1,22 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity foo is
+end entity;
+
+architecture fum of foo is
+ signal counter: unsigned (6 downto 0) := (others => '0');
+begin
+ process (counter) is
+ constant DIV_FACTOR_FM_C: unsigned (6 downto 0) := (others => '1');
+ CONSTANT A : unsigned(6 DOWNTO 0) := "0010100"; -- 20
+ CONSTANT B : unsigned(6 DOWNTO 0) := DIV_FACTOR_FM_C - 1;
+ begin
+ CASE counter IS
+ WHEN A =>
+ WHEN B =>
+ WHEN OTHERS =>
+ END CASE;
+ end process;
+end architecture;
diff --git a/testsuite/gna/bug0131/numstd01.vhdl b/testsuite/gna/bug0131/numstd01.vhdl
new file mode 100644
index 000000000..9b0566dd1
--- /dev/null
+++ b/testsuite/gna/bug0131/numstd01.vhdl
@@ -0,0 +1,23 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity numstd01 is
+end;
+
+architecture behav of numstd01 is
+ constant v : unsigned (15 downto 0) := x"ab02";
+ constant v_1 : unsigned (15 downto 0) := v and x"cfff";
+ constant t : boolean := v_1 = x"8b02";
+begin
+ process
+ begin
+ case true is
+ when t =>
+ report "Test OK";
+ when false =>
+ assert false severity failure;
+ end case;
+ wait;
+ end process;
+end behav;
diff --git a/testsuite/gna/bug0131/numstd02.vhdl b/testsuite/gna/bug0131/numstd02.vhdl
new file mode 100644
index 000000000..8f382e99c
--- /dev/null
+++ b/testsuite/gna/bug0131/numstd02.vhdl
@@ -0,0 +1,24 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity numstd02 is
+end;
+
+architecture behav of numstd02 is
+ constant va : unsigned (15 downto 0) := x"ab02";
+ constant vb : unsigned (15 downto 0) := x"31_de";
+ constant res : unsigned (15 downto 0) := minimum(va, vb);
+ constant t : boolean := res = vb;
+begin
+ process
+ begin
+ case true is
+ when t =>
+ report "Test OK";
+ when false =>
+ assert false severity failure;
+ end case;
+ wait;
+ end process;
+end behav;
diff --git a/testsuite/gna/bug0131/slv01.vhdl b/testsuite/gna/bug0131/slv01.vhdl
new file mode 100644
index 000000000..aa78b0fac
--- /dev/null
+++ b/testsuite/gna/bug0131/slv01.vhdl
@@ -0,0 +1,22 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity slv01 is
+end;
+
+architecture behav of slv01 is
+ constant v : std_logic_vector (15 downto 0) := x"ab02";
+ constant v_1 : std_logic_vector (15 downto 0) := v and x"cfff";
+ constant t : boolean := v_1 = x"8b02";
+begin
+ process
+ begin
+ case true is
+ when t =>
+ report "Test OK";
+ when false =>
+ assert false severity failure;
+ end case;
+ wait;
+ end process;
+end behav;
diff --git a/testsuite/gna/bug0131/testsuite.sh b/testsuite/gna/bug0131/testsuite.sh
new file mode 100755
index 000000000..e1b393556
--- /dev/null
+++ b/testsuite/gna/bug0131/testsuite.sh
@@ -0,0 +1,16 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+analyze_failure foo.vhdl
+
+export GHDL_STD_FLAGS=--std=08
+
+for f in foo slv01 numstd01; do
+ analyze $f.vhdl
+ elab_simulate $f
+done
+
+clean
+
+echo "Test successful"
diff --git a/testsuite/gna/bug0131/to_str1.vhdl b/testsuite/gna/bug0131/to_str1.vhdl
new file mode 100644
index 000000000..c1c2c1579
--- /dev/null
+++ b/testsuite/gna/bug0131/to_str1.vhdl
@@ -0,0 +1,23 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity to_str1 is
+end;
+
+architecture behav of to_str1 is
+ constant v : std_logic_vector (15 downto 0) := x"ab02";
+ constant v_1 : std_logic_vector (15 downto 0) := v and x"cfff";
+ constant v1_str : string (1 to 4) := to_hstring (v_1);
+ constant t : boolean := v1_str = "8b02";
+begin
+ process
+ begin
+ case true is
+ when t =>
+ report "Test OK";
+ when false =>
+ assert false severity failure;
+ end case;
+ wait;
+ end process;
+end behav;