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authorTristan Gingold <tgingold@free.fr>2019-07-24 20:41:56 +0200
committerTristan Gingold <tgingold@free.fr>2019-07-24 20:41:56 +0200
commit554256d7fc71430610ed34eee3e3df92ff9be871 (patch)
tree8225ed19826cb749f95239446af30cde546b43ff
parent6c883b77fb62969bacd8d16abc43d30bcbda3b23 (diff)
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synth: add testcase for previous commit.
-rw-r--r--testsuite/synth/insert01/insert01.vhdl26
-rw-r--r--testsuite/synth/insert01/tb_insert01.vhdl26
-rwxr-xr-xtestsuite/synth/insert01/testsuite.sh16
3 files changed, 68 insertions, 0 deletions
diff --git a/testsuite/synth/insert01/insert01.vhdl b/testsuite/synth/insert01/insert01.vhdl
new file mode 100644
index 000000000..4179006d8
--- /dev/null
+++ b/testsuite/synth/insert01/insert01.vhdl
@@ -0,0 +1,26 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity insert01 is
+ port (a : std_logic_vector (3 downto 0);
+ b : std_logic;
+ o0, o1, o2, o3 : out std_logic_vector (3 downto 0));
+end insert01;
+
+architecture behav of insert01 is
+begin
+ process(a, b)
+ begin
+ o0 <= a;
+ o0 (0) <= b;
+
+ o1 <= a;
+ o1 (1) <= b;
+
+ o2 <= a;
+ o2 (2) <= b;
+
+ o3 <= a;
+ o3 (3) <= b;
+ end process;
+end behav;
diff --git a/testsuite/synth/insert01/tb_insert01.vhdl b/testsuite/synth/insert01/tb_insert01.vhdl
new file mode 100644
index 000000000..276998541
--- /dev/null
+++ b/testsuite/synth/insert01/tb_insert01.vhdl
@@ -0,0 +1,26 @@
+entity tb_insert01 is
+end tb_insert01;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture behav of tb_insert01 is
+ signal a : std_logic_vector (3 downto 0);
+ signal b : std_logic;
+ signal o0, o1, o2, o3 : std_logic_vector (3 downto 0);
+begin
+ dut: entity work.insert01
+ port map (a, b, o0, o1, o2, o3);
+
+ process
+ begin
+ a <= "0111";
+ b <= '0';
+ wait for 1 ns;
+ assert o0 = "0110" severity failure;
+ assert o1 = "0101" severity failure;
+ assert o2 = "0011" severity failure;
+ assert o3 = "0111" severity failure;
+ wait;
+ end process;
+end behav;
diff --git a/testsuite/synth/insert01/testsuite.sh b/testsuite/synth/insert01/testsuite.sh
new file mode 100755
index 000000000..a3ebaaa0d
--- /dev/null
+++ b/testsuite/synth/insert01/testsuite.sh
@@ -0,0 +1,16 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+for t in insert01; do
+ analyze $t.vhdl tb_$t.vhdl
+ elab_simulate tb_$t
+ clean
+
+ synth $t.vhdl -e $t > syn_$t.vhdl
+ analyze syn_$t.vhdl tb_$t.vhdl
+ elab_simulate tb_$t
+ clean
+done
+
+echo "Test successful"