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* hwaccess_x86_io: clean header conceptThomas Heijligen2022-03-141-18/+0
| | | | | | | | | | | | | Move all function implementations into the .c file TEST: `[g]make [WARNERROR=no]` on Linux, FreeBSD, NetBSD, OpenBSD, DragonflyBSD, OpenIndiana, Debian-GNU/Hurd Change-Id: I1400704e9ac5fed00c096796536108d5bfb875e3 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/61276 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips,writeprotect_ranges: add range decoding functionNikolai Artemiev2022-03-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow chips to specify functions that map status register bits to protection ranges. These are used to enumerate available ranges and determine the protection state of chips. The patch also adds a range decoding function for the example chips. Many other chips can also be handled by it, though some will require different functions (e.g. MX25L6406 and related chips). Another approach that has been tried in cros flashrom is maintaining tables of range data, but it quickly becomes error prone and hard to validate. Using a function to interpret the ranges allows compact encoding with most chips and is flexible enough to allow chips with less predictable ranges to be handled as well. BUG=b:195381327,b:153800563 BRANCH=none TEST=dumped range tables, checked against datasheets Change-Id: Id163ed80938a946a502ed116e48e8236e36eb203 Signed-off-by: Nikolai Artemiev <nartemiev@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58480 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* meson.build: Don't depend on getrevision.shSamuel R. Messner2022-02-251-2/+2
| | | | | | | | | | | | | | | | `getrevision.sh` isn't included in exported source code (including GitHub's auto-generated tarballs and ZIPs). Per issue #95, the build shouldn't depend on getrevision.sh for this reason. Previously, however, Flashrom would not build from exported source using Meson due to it requiring `getrevision.sh`. This patch has Meson use the intended `getversion.sh` instead. Signed-off-by: Samuel R. Messner <powpowd@gmail.com> Change-Id: Id8601155b35f0299200c27d0278606127410ff16 Reviewed-on: https://review.coreboot.org/c/flashrom/+/62061 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Add mediatek_i2c_spi interfaceNeill Corlett2022-02-011-0/+5
| | | | | | | | | | | | | | | Add a spi_master interface supporting MediaTek MST9U ISP mode. Autodetect the bus type via I2C_FUNC_I2C, and use the appropriate read/write commands, in case the MST9U is attached to smbus. TEST=Successfully programmed SPI on test hardware. Change-Id: I24adb14e7b4f7160e1c3ff941774064d5a81e820 Signed-off-by: Neill Corlett <corlett@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/61288 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* meson: sync programmer dependencies from MakefilePeter Marheine2022-01-251-44/+65
| | | | | | | | | | | | | | | | | | | | | | The Makefile recently gained finer-grained programmer dependency lists allowing it to track which enabled programmers assume various things about the system, like availability of libraries or the CPU architecture. This change implements the same changes in the Meson configuration file. This fixes a number of programmers to correctly build on non-x86 systems, because they were previously misclassified as dependent on x86 architectural features but actually only used PCI. BUG=none TEST=meson build succeeds on both x86 and ARM Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: Iae93111fd48865f3fe8dd0eb637349b9a0c4affc Reviewed-on: https://review.coreboot.org/c/flashrom/+/61287 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Thomas Heijligen <src@posteo.de>
* Makefile: replace RAW_ACCESS with RAW_MEM_ACCESS X86_MSR X86_PORT_IOThomas Heijligen2022-01-201-1/+0
| | | | | | | | | | | | Let programmer only depend on the kind of hardware access method they really need. Libpci no longer depends on all hardware access types since each programmer handles this individually. Change-Id: I5bdafaa3c5023ad6c4a695493eeddf11bc148085 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60325 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* hwaccess: move mmio functions into hwaccess_physmapThomas Heijligen2022-01-201-1/+0
| | | | | | | | | | | The mmio_le/be_read/writex functions are used for raw memory access. Bundle them with the physmap functions. Change-Id: I313062b078e89630c703038866ac93c651f0f49a Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/61160 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* physmap: rename to hwaccess_physmap, create own headerThomas Heijligen2021-12-221-1/+1
| | | | | | | | | | Line up physmap with the other hwaccess related code. Change-Id: Ieba6f4e94cfc3e668fcb8b3c978de5908aed2592 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60113 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* hwaccess physmap: move x86 msr related code into own filesThomas Heijligen2021-12-221-0/+1
| | | | | | | | | | | | Allow x86 msr related code to be compiled independent from memory mapping functionality. This enables for a better selection of needed hardware access types. Change-Id: Idc9ce9df3ea1e291ad469de59467646b294119c4 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60111 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* hwaccess: move x86 port I/O related code into own filesThomas Heijligen2021-12-221-0/+2
| | | | | | | | | | | | Allow port I/O related code to be compiled independent from memory mapping functionality. This enables for a better selection of needed hardware access types. Change-Id: I372b4a409f036da766c42bc406b596bc41b0f75a Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60110 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: meson.build: remove unused CONFIG_I2C_SUPPORTThomas Heijligen2021-10-261-1/+0
| | | | | | | | | | | | CONFIG_I2C_SUPPORT has no mention in the source code. No need to pass it to the compiler. Change-Id: I2e19335e1b8d39f44dda14edc0a496dda6bc8c9c Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58495 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* buildsystem: evaluate the USE_IOPL, USE_DEV_IO, USE_IOPERM macrosThomas Heijligen2021-10-151-0/+18
| | | | | | | | | | | Determine which macro has to be set for the target system. Do this in the buildsystem instead of using preprocessor macros. Change-Id: Ic41ea025e35feb93f07ce7a94c0d15e6e84f38b9 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58278 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* buildsystem: handle the IS_WINDOWS macroThomas Heijligen2021-10-151-0/+6
| | | | | | | | | | On Windows target systems set the IS_WINDOWS=1 macro by the buildsystem. Change-Id: I334708f2dec08ec9ca6ad4161fbd7fe22ac023a6 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58277 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* buildsystem: Determine the endianness only in the buildsystemThomas Heijligen2021-10-151-0/+7
| | | | | | | | | | | | | Let the buildsystem (make / meson) handle the endianness determination and set the __FLASHROM_LITTLE_ENDIAN__ or __FLASHROM_BIG_ENDIAN__ macro as cflag. Change-Id: I37093528ae55e712cc30a0267a8ceac332750e7d Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58273 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Felix Singer <felixsinger@posteo.net>
* custom_baud: move Linux specific code into own fileThomas Heijligen2021-09-281-1/+5
| | | | | | | | | | | Handle system specific code in an own file like i2c_helper_linux.c. The build system decides when to build it. Change-Id: I0744e769dcc6000483e7256105903a87e927ee77 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57990 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* mec1308: remove MEC1308 EC programmerVictor Ding2021-09-221-5/+0
| | | | | | | | | | | | | | | | | Best efforts were made to upstream older Chromebook support for good intentions for folks interested. However, we no longer have the hardware available to test and maintain the code as the hardware is now end of life. Therefore the code state has sadly fallen into a unknown state. BUG=none BRANCH=none TEST=builds and ninja test passes Signed-off-by: Victor Ding <victording@google.com> Change-Id: I535b6380846734c999474519e9e60a73eb6a2ec4 Reviewed-on: https://review.coreboot.org/c/flashrom/+/56476 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* ene_lpc: remove ENE LPC programmerVictor Ding2021-09-221-5/+0
| | | | | | | | | | | | | | | | | Best efforts were made to upstream older Chromebook support for good intentions for folks interested. However, we no longer have the hardware available to test and maintain the code as the hardware is now end of life. Therefore the code state has sadly fallen into a unknown state. BUG=none BRANCH=none TEST=builds and ninja test passes Signed-off-by: Victor Ding <victording@google.com> Change-Id: I3f40db22c42c04ce029c4defd837e05ebb550c9b Reviewed-on: https://review.coreboot.org/c/flashrom/+/56475 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* CONFIG_DEFAULT_PROGRAMMER_NAME: Use programmer name instead of enumThomas Heijligen2021-06-101-3/+11
| | | | | | | | | | | | | | CONFIG_DEFAULT_PROGRAMER_NAME replaces CONFIG_DEFAULT_PROGRAMMER. It uses the name of the programmer for identification. make CONFIG_DEFAULT_PROGRAMER_NAME=dummy and meson -Ddefault_programmer_name=dummy will extend to CONFIG_DEFAULT_PROGRAMER_NAME=&programmer_dummy in the code. Change-Id: I976447787c6f6bfbdc0145d80d61e1ddcf97ac33 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55123 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* programmer_table: move array content to an own fileThomas Heijligen2021-06-091-0/+1
| | | | | | | | Change-Id: I8e6d704e845ee4152c8676dd19dff0934fff007b Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52944 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* tests: Add unit test to run init/shutdown for mec1308.c, ene_lpc.cAnastasia Klimchuk2021-06-051-0/+1
| | | | | | | | | | | | | | | | This patch includes mocks for io operations in hwaccess_x86_io.h because those are needed to test lifecycle of mec1308.c and ene_lpc.c BUG=b:181803212 TEST=builds and ninja test Change-Id: I3af612defe1af3850dfc1626a208d873e3a3eddc Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/51487 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* meson.build: Fix cmocka to be optional at configure-timeEdward O'Callaghan2021-05-181-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | While building with meson, however without libcmocka available, attempts are made to fetch a copy to build via the wrap mechanism. However in hermetic build enviroments this causes hard failure as the dependency declaration of cmocka is not optional. Fix this to ensure flashrom can build hermetically in images without libcmocka available. BUG=none BRANCH=none TEST=` $ mkdir build && cd build/ $ meson --wrap-mode=nodownload --wrap-mode=nofallback ../ $ ninja test # validate configs, builds and no tests are run. -- $ sudo apt install libcmocka-dev $ mkdir build && cd build/ $ meson --wrap-mode=nodownload --wrap-mode=nofallback ../ $ ninja test # validate configs, builds and tests are run. ` Change-Id: Ib59f4dacc14be9b02334ca59b348c19e22963367 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54368 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* meson: remove rayer_spi dependency on libpciDaniel Campello2021-04-141-1/+1
| | | | | | | | | | | | | This change removes the build dependency on libpci for config_rayer_spi it also makes sure that dependency on raw_access is maintained. Signed-off-by: Daniel Campello <campello@chromium.org> Change-Id: If7206a69d031c9bba9475a9e6769f6ef35701379 Reviewed-on: https://review.coreboot.org/c/flashrom/+/51929 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile,meson.build: Fix dependency issues with raiden_debug_spiEdward O'Callaghan2021-04-011-1/+1
| | | | | | | | | | | | | | | | | | The Raiden debug external spi programmer need only depend on libusb and is unrelated to libpci. Correct meson and gnu make builds where meson had configuration in the incorrect section and gnu make artifactually disabled the build on Windows/MinGW which doesn't have libpci. BUG=none TEST=still continues to build. Change-Id: I2d6a8c33a2228abf006a9b278bcb7133765c7074 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/51930 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Enable dynamic memory allocation checks for cmocka unit testsAnastasia Klimchuk2021-04-011-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit enables the feature and makes changes to existing files and tests. I am writing more new tests with this. Commit includes tests/flashrom.c because after enabling memory checks the test started to fail (it used to leak memory indeed). If you are wondering how to verify it works (because at the moment all tests [still] pass so it’s not obvious that anything has changed), then for example: 1) Remove free’s in flashbuses_to_text_test_success test, and it will fail with message similar to this (line numbers from your local source) [ ERROR ] --- Blocks allocated... ../flashrom.c:1239: note: block 0x55f42304b640 allocated here ../flashrom.c:1239: note: block 0x55f42304b5c0 allocated here ../flashrom.c:1239: note: block 0x55f42304b3d0 allocated here ../flashrom.c:1239: note: block 0x55f42304b700 allocated here ../flashrom.c:1239: note: block 0x55f42304b780 allocated here ../flashrom.c:1239: note: block 0x55f42304bb00 allocated here ../flashrom.c:1239: note: block 0x55f42304b810 allocated here ERROR: flashbuses_to_text_test_success leaked 7 block(s) 2) Add char *temp = malloc just before return from strcat_realloc [ ERROR ] --- Blocks allocated... ../helpers.c:88: note: block 0x55a51307b6c0 allocated here ../helpers.c:88: note: block 0x55a51307b9e0 allocated here ERROR: strcat_realloc_test_success leaked 2 block(s) BUG=b:181803212 TEST=builds and ninja test nm builddir/tests/flashrom_unit_tests.p/.._flashrom.c.o nm builddir/tests/flashrom_unit_tests.p/flashrom.c.o nm builddir/flashrom.p/flashrom.c.o Change-Id: I0c6b6b8dc17aaee28640e3fca3d1fc9f7feabf5f Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/51243 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* meson: Generalise libflashrom product to link as static or dynDaniel Campello2021-03-191-1/+1
| | | | | | | | | | | Allow the user to specify if they would like a static archive or a DSO produced for libflashrom by way of the flag e.g. `-Ddefault_library=static`. Signed-off-by: Daniel Campello <campello@chromium.org> Change-Id: I77e5c298163979a0222270b3ac5d03542e5618f7 Reviewed-on: https://review.coreboot.org/c/flashrom/+/51616 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* meson: Add print_wiki optionDaniel Campello2021-03-191-0/+6
| | | | | | | | | | | Align meson options to be equivalent to the Makefile as they are used in Gentoo's ebuilds. Signed-off-by: Daniel Campello <campello@chromium.org> Change-Id: I97d2fd687aa21533b86f9af446038bfe3da1f7d3 Reviewed-on: https://review.coreboot.org/c/flashrom/+/51552 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* meson: fix dependency on raw accessDaniel Campello2021-03-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is matching the following comment on Makefile: \# This is a dirty hack, but it saves us from checking all PCI drivers and all platforms manually. \# libpci may need raw memory, MSR or PCI port I/O on some platforms. \# Individual drivers might have the same needs as well. This changes fixes: ld.lld: error: undefined symbol: rget_io_perms >>> referenced by internal.c:243 (../flashrom-9999/internal.c:243) >>> libflashrom.so.1.0.0.p/internal.c.o:(internal_init) ld.lld: error: undefined symbol: mmio_writeb >>> referenced by internal.c:122 (../flashrom-9999/internal.c:122) >>> libflashrom.so.1.0.0.p/internal.c.o:(internal_chip_writeb) ld.lld: error: undefined symbol: mmio_writew >>> referenced by internal.c:128 (../flashrom-9999/internal.c:128) >>> libflashrom.so.1.0.0.p/internal.c.o:(internal_chip_writew) ld.lld: error: undefined symbol: mmio_writel >>> referenced by internal.c:134 (../flashrom-9999/internal.c:134) >>> libflashrom.so.1.0.0.p/internal.c.o:(internal_chip_writel) ld.lld: error: undefined symbol: mmio_readb >>> referenced by internal.c:140 (../flashrom-9999/internal.c:140) >>> libflashrom.so.1.0.0.p/internal.c.o:(internal_chip_readb) ld.lld: error: undefined symbol: mmio_readw >>> referenced by internal.c:146 (../flashrom-9999/internal.c:146) >>> libflashrom.so.1.0.0.p/internal.c.o:(internal_chip_readw) ld.lld: error: undefined symbol: mmio_readl >>> referenced by internal.c:152 (../flashrom-9999/internal.c:152) >>> libflashrom.so.1.0.0.p/internal.c.o:(internal_chip_readl) ld.lld: error: undefined symbol: mmio_readn >>> referenced by internal.c:158 (../flashrom-9999/internal.c:158) >>> libflashrom.so.1.0.0.p/internal.c.o:(internal_chip_readn) ld.lld: error: undefined symbol: physmap >>> referenced by flashrom.c:1454 (../flashrom-9999/flashrom.c:1454) >>> libflashrom.so.1.0.0.p/flashrom.c.o:(probe_flash) >>> referenced by flashrom.c:1454 (../flashrom-9999/flashrom.c:1454) >>> libflashrom.so.1.0.0.p/flashrom.c.o:(probe_flash) >>> referenced by flashrom.c >>> libflashrom.so.1.0.0.p/flashrom.c.o:(programmer_table) >>> referenced 2 more times ld.lld: error: undefined symbol: physunmap >>> referenced by flashrom.c >>> libflashrom.so.1.0.0.p/flashrom.c.o:(programmer_table) >>> referenced by flashrom.c >>> libflashrom.so.1.0.0.p/flashrom.c.o:(programmer_table) >>> referenced by flashrom.c >>> libflashrom.so.1.0.0.p/flashrom.c.o:(programmer_table) Change-Id: Id3fa4ec7a735b81e989ba9fe2b53b18d0956627a Signed-off-by: Daniel Campello <campello@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/51577 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Richard Hughes <hughsient@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* meson.build: Require at least meson 0.50.0Angel Pons2021-01-281-1/+1
| | | | | | | | | | | | | | | | The `install` argument in `configure_file` is a feature introduced in meson '0.50.0', but meson.build requests '>=0.47.0'. Meson complains: WARNING: Project targeting '>=0.47.0' but tried to use feature introduced in '0.50.0': install arg in configure_file. To correct this, adjust the `meson_version` value accordingly. Change-Id: Iadcffb7f8c720ffa8aa5f0ad62638d7b37f39934 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/49924 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com>
* meson: Rename 'config_raiden' to 'config_raiden_debug_spi'Edward O'Callaghan2021-01-271-3/+3
| | | | | | | | | | | | | | | Make meson build option name consistent with the the spi masters implementation name. BUG=none TEST=builds Change-Id: Icb6c73ab3d4369fcffb96eb117fc376da75dfb84 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/49914 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Sam McNally <sammc@google.com>
* meson: Add missing config option for J-Link SPIMarc Schink2020-12-131-0/+6
| | | | | | | | | Signed-off-by: Marc Schink <dev@zapb.de> Change-Id: I476c649f9db7342688560aac9ee5df056517a028 Reviewed-on: https://review.coreboot.org/c/flashrom/+/48478 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* s25f.c: implement probing and block erasers for SpansionNikolai Artemiev2020-12-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | This adds support for Spansion 25Fxxxxx chips. These chips require their own probing logic because the first 6 bytes returned by RDID must be examined to identify the chip. New erase functions are required as the chips support multiple sector layouts, and the default layout must be changed to be able to erase the entire flash. Adapted from cros flashrom at `9c4c9a56b6a0370b383df9c75d71b3bd469e672d`. BUG=b:153800073 TEST=builds Signed-off-by: Nikolai Artemiev <nartemiev@google.com> Change-Id: I2d23f9c36ce8b2959807fbeee7f60e02444e3763 Reviewed-on: https://review.coreboot.org/c/flashrom/+/46140 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* raiden_debug: Rename with '_DEBUG_SPI' suffixEdward O'Callaghan2020-11-281-1/+1
| | | | | | | | | | | | Unfortantly raiden_debug was upstreamed with a misnaming of the CONFIG_ make param that introduces unnecessary divergence. Rename to 'CONFIG_RAIDEN_DEBUG_SPI' as-is downstream. Change-Id: I07c03647c329286bb223e4dae4665704e508db2c Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/48105 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com>
* Add writeprotect support infrastructureEdward O'Callaghan2020-09-281-0/+1
| | | | | | | | | | | | | | | | The following just lays out the structure for write protect manipulation of SPI flash chips in Flashrom. We later follow up with adding support for each manufacturer group. BUG=b:153800563 BRANCH=none TEST=builds Change-Id: Id93b5a1cb2da476fa8a7dde41d7b963024117474 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/40325 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Add MEC1308 EC programmerVictor Ding2020-08-201-0/+5
| | | | | | | | | | | | | Initial support of Microchip MEC1308 Embedded Controller. BUG=b:156144893 BRANCH=none Signed-off-by: Victor Ding <victording@google.com> Change-Id: I2d51b4bdc0b38b6e488e71b9e774eb6232a2069e Reviewed-on: https://review.coreboot.org/c/flashrom/+/44541 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* Add ENE LPC programmerVictor Ding2020-08-201-0/+5
| | | | | | | | | | | | | | Initial support of ENE LPC interface keyboard controller. BUG=b:156140422 BRANCH=none Signed-off-by: Victor Ding <victording@google.com> Change-Id: I970afd8c1bd92c159c60e09f22e2f18c0433729d Reviewed-on: https://review.coreboot.org/c/flashrom/+/44580 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* meson: Do not compile with -DSTANDALONERichard Hughes2020-08-041-1/+0
| | | | | | | | | | | This enables the -o option which is used to collect logs for debugging. Change-Id: If6c12c682ba72cd519e30f1f8c96552322ff75e3 Signed-off-by: Richard Hughes <richard@hughsie.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/42230 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
* meson: fix compilation under uClibc-ngRosen Penev2020-07-211-1/+1
| | | | | | | | | | | | | | | fileno requires _POSIX_C_SOURCE to only be defined. nanosleep requires _POSIX_C_SOURCE to be defined to 199309L. strndup requires _POSIX_C_SOURCE to be defined to 200809L. Change-Id: Idb80937bb78e173eb03f2a0c0cdd8925fcd7bfa1 Signed-off-by: Rosen Penev <rosenp@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/43599 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Install the man file when using meson as a buildsystemRichard Hughes2020-07-151-0/+11
| | | | | | | | | | | | This fixes a regression with the Fedora package. Change-Id: I881bd5002a842072ce9dadea033c51a2668f9e7c Signed-off-by: Richard Hughes <richard@hughsie.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/38939 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* tests/: Add CMocka unit-test infrastructureEdward O'Callaghan2020-06-161-0/+20
| | | | | | | | | | | | | | | | This adds the CMocka unit-testing infrastructure into the meson build system which we will latter follow up with unit-tests for flashrom's core logic. BUG=b:157280555 BRANCH=none TEST=builds Change-Id: I66665f56627b3d99049176bfbebbd771b080370a Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/41622 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* Initial Realtek MST i2c_spi supportEdward O'Callaghan2020-05-041-0/+5
| | | | | | | | | | | | | | | | | | | | | This spi master allows for programming of a Realtek RTD2142 MST with external SPI flash chip routed via its internal i2c transport mechanism. BUG=b:152558985,b:148745673 BRANCH=none TEST=echo "00000000:0004ffff fw" > layout && \ flashrom -p realtek_mst_i2c_spi:bus=8 -l layout -i fw:dump.bin -r && \ flashrom -p realtek_mst_i2c_spi:bus=8 -l layout -i fw:dump.bin -w && \ flashrom -p realtek_mst_i2c_spi:bus=8 --flash-size && \ flashrom -p realtek_mst_i2c_spi:bus=8 --flash-name Change-Id: I892e0be776fe605e69fb39c77abf3016591d7123 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/40667 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Shiyu Sun <sshiyu@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* lspcon_i2c_spi.c: Add SPI-master support for PS17{5,6}Shiyu Sun2020-04-011-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | This adds support for the Parade lspcon usb-c to HDMI protocol translater part that is i2c-controlled. The support allows the host to reach the SPI ROM that hangs off the part where it stores its firmware. Usage is as follows: flashrom -p lspcon_i2c_spi:bus=X where X is the bus number. BUG=b:148746232 BRANCH=none TEST=tested with following commands, read/write/erase works good. flashrom -p lspcon_i2c_spi:bus=7 -r /tmp/foo; flashrom -p lspcon_i2c_spi:bus=7 -E; flashrom -p lspcon_i2c_spi:bus=7 -w /tmp/foo; Change-Id: I039e683252cfaf1ffef8694a3e8081b1b6b944f7 Signed-off-by: Shiyu Sun <sshiyu@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/39687 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* i2c_helper: Add support for the Linux I2C subsystemShiyu Sun2020-04-011-0/+5
| | | | | | | | | | | | | | | | | See https://www.kernel.org/doc/Documentation/i2c/ for details. This creates common interface for I2C access functions, and adds implementation for linux I2C functions. BUG=b:148746232 BRANCH=none TEST=build success Signed-off-by: Shiyu Sun <sshiyu@chromium.org> Change-Id: Ie0487824dfb71970bede17f617dbbb30ddf78c12 Reviewed-on: https://review.coreboot.org/c/flashrom/+/39686 Tested-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* raiden_debug: Upstream ChromiumOS servo debug board progEdward O'Callaghan2020-03-031-0/+6
| | | | | | | | | | | | | | | | | | Initial check-in of the Raiden debugger programmer. Squash in, raiden_debug: Add missing .write_aai cb fn raiden_debug: greatly improve protocol documentation BUG=b:143389556 BRANCH=none TEST=builds Change-Id: Ifad273a708acea4de797a0808be58960635a8864 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/38209 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* raiden_debug: Upstream ChromiumOS usb_device helpersEdward O'Callaghan2020-03-021-0/+1
| | | | | | | | | | | | | | | These are helpful usb device accessors and helpers that are later used for the so-called Raiden debugger programmer. BUG=b:143389556 BRANCH=none TEST=builds Change-Id: Ic928220fc919fe4958c8150e61e11470dac88f13 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/38936 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* Add support for STLINK V3 debugger/programmer via its SPI bridgeMiklós Márton2019-12-311-0/+5
| | | | | | | | Change-Id: Icffab87ac8f2c570187ed753ec70f054541873a4 Signed-off-by: Miklós Márton <martonmiklosqdev@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/34661 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* util/getversion,meson: Add script to allow version info with MesonNico Huber2019-11-061-1/+1
| | | | | | | | | | | | | | | | | | | Add `util/getversion.sh` that retrieves version information from a `versioninfo.inc` (what we use for releases) if present or uses `util/getrevision.sh` if not. Let Meson use it for flashrom's version. It seems Meson doesn't generate the manual page at all, so the `--man-date` command is currently unused. Change-Id: I401e5638509c4a573bc0cb17ebc5fa76df9700b5 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/35561 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mario Limonciello <superm1@gmail.com> Reviewed-by: Richard Hughes <hughsient@gmail.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Correct the pkgconfig generated file namingMario Limonciello2019-10-161-3/+3
| | | | | | | | | | | | The typical convention is to not use the `lib` prefix (ie `libfoo`) but instead to just use foo. Change-Id: I5ab46418e2a1708d5c11970f1e56250f2adb7d70 Signed-off-by: Mario Limonciello <mario.limonciello@dell.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/36069 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Richard Hughes <richard@hughsie.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
* meson.build: Sanitize the version stringMario Limonciello2019-10-161-1/+10
| | | | | | | | | | | Match strictly the library version, and remove all starting letters. Change-Id: I25587ed2ad7fbcffdf14eb758c1f0d6ab2aea545 Signed-off-by: Mario Limonciello <mario.limonciello@dell.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/35566 Tested-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Richard Hughes <richard@hughsie.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile,meson.build: Enable/assume -WextraNico Huber2019-10-051-2/+0
| | | | | | | | | | | | Enable all -Wextra warnings but -Wunused-parameter. Nobody seems to miss warnings about unused parameters and we have a lot unavoidable occurrences in flashrom because of common interfaces. Change-Id: Id2ece264c2d483e34019985dd3a7631c4889abe6 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/30411 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
* meson: Correct license to GPL-2.0Nico Huber2019-10-051-1/+1
| | | | | | | | | | | Parts of flashrom are 2.0+ but some are not. As Meson's purpose is to link these together, it should advertise only GPL-2.0 for the whole. Change-Id: Iab99c74f5f9d54dac56085ecc7475b14be00a310 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/35584 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-16 19:36:22 +0000