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| author | Shiyu Sun <sshiyu@google.com> | 2020-03-19 14:37:57 +1100 |
|---|---|---|
| committer | Edward O'Callaghan <quasisec@chromium.org> | 2020-04-01 06:34:16 +0000 |
| commit | 13a2ef6cbd0838a7965914dda3b4a63ff4ae5440 (patch) | |
| tree | d1983d5cc5fc33a2a163c72a87f41d0a46ecfd57 /meson.build | |
| parent | dc2c83bbc7dcf071af1a9ad80192fa1f80f09b14 (diff) | |
| download | flashrom-13a2ef6cbd0838a7965914dda3b4a63ff4ae5440.tar.gz flashrom-13a2ef6cbd0838a7965914dda3b4a63ff4ae5440.tar.bz2 flashrom-13a2ef6cbd0838a7965914dda3b4a63ff4ae5440.zip | |
lspcon_i2c_spi.c: Add SPI-master support for PS17{5,6}
This adds support for the Parade lspcon usb-c to HDMI protocol
translater part that is i2c-controlled. The support allows the
host to reach the SPI ROM that hangs off the part where it
stores its firmware.
Usage is as follows:
flashrom -p lspcon_i2c_spi:bus=X
where X is the bus number.
BUG=b:148746232
BRANCH=none
TEST=tested with following commands, read/write/erase works good.
flashrom -p lspcon_i2c_spi:bus=7 -r /tmp/foo;
flashrom -p lspcon_i2c_spi:bus=7 -E;
flashrom -p lspcon_i2c_spi:bus=7 -w /tmp/foo;
Change-Id: I039e683252cfaf1ffef8694a3e8081b1b6b944f7
Signed-off-by: Shiyu Sun <sshiyu@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/39687
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Diffstat (limited to 'meson.build')
| -rw-r--r-- | meson.build | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/meson.build b/meson.build index b847c63b..699370a6 100644 --- a/meson.build +++ b/meson.build @@ -63,6 +63,7 @@ config_satasii = get_option('config_satasii') config_serprog = get_option('config_serprog') config_usbblaster_spi = get_option('config_usbblaster_spi') config_stlinkv3_spi = get_option('config_stlinkv3_spi') +config_lspcon_i2c_spi = get_option('config_lspcon_i2c_spi') cargs = [] deps = [] @@ -283,6 +284,10 @@ if config_stlinkv3_spi srcs += 'stlinkv3_spi.c' cargs += '-DCONFIG_STLINKV3_SPI=1' endif +if config_lspcon_i2c_spi + srcs += 'lspcon_i2c_spi.c' + cargs += '-DCONFIG_LSPCON_I2C_SPI=1' +endif # bitbanging SPI infrastructure if config_bitbang_spi |