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path: root/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.h
Commit message (Expand)AuthorAgeFilesLines
* Mass update of all drivers to use the new DMA API. What could possibly go wrong?Giovanni Di Sirio2019-01-021-19/+20
* Dynamic DMA allocation for STM32H7xx.Giovanni Di Sirio2018-12-281-0/+14
* DMA rework.Giovanni Di Sirio2018-12-281-15/+56
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12412 110e8d01-0319-4d1...Giovanni Di Sirio2018-11-091-0/+4
* Mass update of the Apache 2.0 license statement.Giovanni Di Sirio2018-01-201-1/+1
* Unified MPU handler.Giovanni Di Sirio2018-01-081-2/+0
* Added unified cache handler for Cortex-M devices.Giovanni Di Sirio2018-01-081-69/+2
* SPI driver works, probably optimizations are possible.Giovanni Di Sirio2018-01-051-0/+1
* Added new macro to DMAv2 dmaStreamGetCurrentTarget().Giovanni Di Sirio2017-09-241-0/+14
* DMAv2 fixes for STM32F76x/77x.Giovanni Di Sirio2017-04-021-1/+1
* Updated header guards for STM32 files.Giovanni Di Sirio2016-04-021-3/+3
* Mass license update.Giovanni Di Sirio2016-03-181-1/+1
* SDMMC1 now compilable on STM32L4.Giovanni Di Sirio2015-12-161-3/+12
* Restored original dmaStreamDisable() macro.gdisirio2015-09-021-3/+4
* Improved M7 cache handling.Giovanni Di Sirio2015-08-271-13/+157
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8242 35acf78f-673a-0410...Giovanni Di Sirio2015-08-261-0/+32
* SPI working on F7 but cache handling unfinished.Giovanni Di Sirio2015-08-261-4/+6
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8212 35acf78f-673a-0410...gdisirio2015-08-131-6/+12
* Added cache handling to DMAv2 driver.gdisirio2015-08-131-0/+23
* STM32 DMAv2 driver added.Giovanni Di Sirio2015-08-041-0/+459
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