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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-08-26 10:03:11 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-08-26 10:03:11 +0000 |
| commit | ccef2d248b7269766f00b9122eb1930aa1100605 (patch) | |
| tree | ba8726deab2ac075c6f74cf4cea55551f953fec0 /os/hal/ports/STM32/LLD/DMAv2/stm32_dma.h | |
| parent | 9e5337241d7be9c50d97e2562ecd50e09d4c2325 (diff) | |
| download | ChibiOS-ccef2d248b7269766f00b9122eb1930aa1100605.tar.gz ChibiOS-ccef2d248b7269766f00b9122eb1930aa1100605.tar.bz2 ChibiOS-ccef2d248b7269766f00b9122eb1930aa1100605.zip | |
SPI working on F7 but cache handling unfinished.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8241 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/LLD/DMAv2/stm32_dma.h')
| -rw-r--r-- | os/hal/ports/STM32/LLD/DMAv2/stm32_dma.h | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.h b/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.h index ab46ecf43..49139f831 100644 --- a/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.h +++ b/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.h @@ -126,6 +126,7 @@ * @name CR register constants common to all DMA types
* @{
*/
+#define STM32_DMA_CR_RESET_VALUE 0x00000000U
#define STM32_DMA_CR_EN DMA_SxCR_EN
#define STM32_DMA_CR_TEIE DMA_SxCR_TEIE
#define STM32_DMA_CR_HTIE DMA_SxCR_HTIE
@@ -178,6 +179,7 @@ * @name FCR register constants only found in STM32F2xx/STM32F4xx
* @{
*/
+#define STM32_DMA_FCR_RESET_VALUE 0x00000021U
#define STM32_DMA_FCR_FEIE DMA_SxFCR_FEIE
#define STM32_DMA_FCR_FS_MASK DMA_SxFCR_FS
#define STM32_DMA_FCR_DMDIS DMA_SxFCR_DMDIS
@@ -398,11 +400,10 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags); * @special
*/
#define dmaStreamDisable(dmastp) { \
- (dmastp)->stream->CR &= ~(STM32_DMA_CR_TCIE | STM32_DMA_CR_HTIE | \
- STM32_DMA_CR_TEIE | STM32_DMA_CR_DMEIE | \
- STM32_DMA_CR_EN); \
+ (dmastp)->stream->CR &= ~STM32_DMA_CR_EN; \
while (((dmastp)->stream->CR & STM32_DMA_CR_EN) != 0U) \
; \
+ (dmastp)->stream->CR = STM32_DMA_CR_RESET_VALUE; \
dmaStreamClearInterrupt(dmastp); \
}
@@ -445,7 +446,8 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags); dmaStreamSetTransactionSize(dmastp, n); \
dmaStreamSetMode(dmastp, (mode) | \
STM32_DMA_CR_MINC | STM32_DMA_CR_PINC | \
- STM32_DMA_CR_DIR_M2M | STM32_DMA_CR_EN); \
+ STM32_DMA_CR_DIR_M2M); \
+ dmaStreamEnable(dmastp); \
}
/**
|