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* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12247 110e8d01-0319-4d1...Giovanni Di Sirio2018-09-071-0/+136
* Updated CMSIS to 5.4.0.Giovanni Di Sirio2018-09-0623-551/+1905
* Fixed bugsedolomb2018-09-061-0/+65
* Fixed bug #975.Giovanni Di Sirio2018-08-262-11/+16
* More L4+ code.Giovanni Di Sirio2018-07-251-0/+85
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12160 110e8d01-0319-4d1...Giovanni Di Sirio2018-07-111-1/+0
* Fixed some alignment rules.Giovanni Di Sirio2018-07-114-19/+2
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12158 110e8d01-0319-4d1...Giovanni Di Sirio2018-07-111-1/+1
* Workaround for clang linker bug.Giovanni Di Sirio2018-07-101-15/+22
* Missing files.Giovanni Di Sirio2018-07-102-0/+483
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12152 110e8d01-0319-4d1...Giovanni Di Sirio2018-07-093-15/+5
* Clang stuff and a fix.Giovanni Di Sirio2018-07-093-43/+359
* Updated CMSIS to 5.3.0.Giovanni Di Sirio2018-07-0730-2348/+4237
* Makefile optimizations, adjusted some scatter files.Giovanni Di Sirio2018-07-068-105/+72
* Spurious character removed.Giovanni Di Sirio2018-06-301-1/+1
* Fixed bug: removed subalignedolomb2018-06-191-4/+4
* Fixed bug: removed subalignedolomb2018-06-191-4/+4
* Added initializer sections for flash0...flash7 memory areas in GCC Cortex-M l...Giovanni Di Sirio2018-06-0211-228/+365
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12072 110e8d01-0319-4d1...Giovanni Di Sirio2018-06-021-28/+0
* Fixed bug #952.Giovanni Di Sirio2018-05-271-6/+10
* Fixed bug #950.Giovanni Di Sirio2018-05-262-0/+2
* Added F413 board, demo and revised HAL code, to be tested.Giovanni Di Sirio2018-05-142-1/+92
* Fixed bug #947.Giovanni Di Sirio2018-05-122-2/+2
* Added missing file.Giovanni Di Sirio2018-05-051-0/+33
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11997 110e8d01-0319-4d1...Giovanni Di Sirio2018-05-0411-170/+4
* Removed -fsingle-precision-constant as default FPU option.Giovanni Di Sirio2018-04-281-1/+1
* Fixed bug #941.Giovanni Di Sirio2018-04-271-1/+1
* Fixed ID number 1 and 73 as per datasheet errata.isiora2018-04-131-0/+7
* Readded Aes wrapperedolomb2018-04-131-0/+3
* Fixed bugsedolomb2018-04-131-0/+4
* Added ARM_SUPPORTS_L2CC.isiora2018-04-131-2/+2
* Added the L2 management, and an option on cache disable.isiora2018-04-132-29/+58
* Added the L2 management, and an option on cache disable.isiora2018-04-132-29/+56
* Added ARM_SUPPORTS_L2CC.isiora2018-04-131-1/+3
* FIxed the path of mmu.cisiora2018-04-131-1/+1
* Mapped the sdmmc memory region as non secure.isiora2018-04-131-4/+34
* Fixed ID number 1 and 73 as per datasheet errata.isiora2018-04-131-7/+3
* Added ID_PMC and ID_RSTCedolomb2018-04-131-0/+2
* Added ID_PMC and ID_RSTCedolomb2018-04-131-0/+2
* Fixed bug #935.Giovanni Di Sirio2018-04-1311-108/+109
* Re-added temporary Aes wrapperedolomb2018-04-111-1/+6
* STM32L4+ preliminary work.Giovanni Di Sirio2018-04-0424-387547/+386494
* Fixed a problem in the new clean rule.Giovanni Di Sirio2018-03-236-24/+60
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11832 110e8d01-0319-4d1...isiora2018-03-211-0/+46
* Minor changes.isiora2018-03-212-1/+13
* update hal crypto sha lld, added integration with wolfcryptareviu2018-03-191-6/+0
* Minor changes.isiora2018-03-161-4/+5
* Changed domains in TLB from 'manager' to 'client' in order to enable the sect...isiora2018-03-151-27/+27
* Added TSSI version service.isiora2018-03-152-30/+51
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11729 110e8d01-0319-4d1...Giovanni Di Sirio2018-03-136-11/+17
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