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authorGiovanni Di Sirio <gdisirio@gmail.com>2018-07-06 12:54:03 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2018-07-06 12:54:03 +0000
commit858b658d39ee627da66d1296e7b623604adee556 (patch)
tree8bd31e04060f8223fe8a2f9bc65765462f649d92 /os/common
parent3a109194972f3671092d4e0767fc2f3c63a5a363 (diff)
downloadChibiOS-858b658d39ee627da66d1296e7b623604adee556.tar.gz
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Makefile optimizations, adjusted some scatter files.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12129 110e8d01-0319-4d1e-a829-52ad28d1bb01
Diffstat (limited to 'os/common')
-rw-r--r--os/common/startup/ARM/compilers/GCC/ld/rules.ld4
-rw-r--r--os/common/startup/ARMCAx-TZ/compilers/GCC/ld/rules.ld4
-rw-r--r--os/common/startup/ARMCMx/compilers/GCC/ld/rules_stacks.ld4
-rw-r--r--os/common/startup/ARMCMx/compilers/GCC/mk/arm-none-eabi.mk23
-rw-r--r--os/common/startup/ARMCMx/compilers/GCC/mk/rules.mk (renamed from os/common/startup/ARMCMx/compilers/GCC/rules.mk)70
-rw-r--r--os/common/startup/e200/compilers/GCC/ld/rules_z0.ld24
-rw-r--r--os/common/startup/e200/compilers/GCC/ld/rules_z3.ld24
-rw-r--r--os/common/startup/e200/compilers/GCC/ld/rules_z4.ld24
8 files changed, 72 insertions, 105 deletions
diff --git a/os/common/startup/ARM/compilers/GCC/ld/rules.ld b/os/common/startup/ARM/compilers/GCC/ld/rules.ld
index 61a5b6132..c6245820b 100644
--- a/os/common/startup/ARM/compilers/GCC/ld/rules.ld
+++ b/os/common/startup/ARM/compilers/GCC/ld/rules.ld
@@ -111,7 +111,7 @@ SECTIONS
_etext = .;
_textdata = _etext;
- .stacks :
+ .stacks (NOLOAD) :
{
. = ALIGN(8);
__stacks_base__ = .;
@@ -132,7 +132,7 @@ SECTIONS
PROVIDE(_edata = .);
} > DATA_RAM AT > flash
- .bss : ALIGN(4)
+ .bss (NOLOAD) : ALIGN(4)
{
. = ALIGN(4);
PROVIDE(_bss_start = .);
diff --git a/os/common/startup/ARMCAx-TZ/compilers/GCC/ld/rules.ld b/os/common/startup/ARMCAx-TZ/compilers/GCC/ld/rules.ld
index 5a35f87f2..bc2ca659d 100644
--- a/os/common/startup/ARMCAx-TZ/compilers/GCC/ld/rules.ld
+++ b/os/common/startup/ARMCAx-TZ/compilers/GCC/ld/rules.ld
@@ -111,7 +111,7 @@ SECTIONS
_etext = .;
_textdata = _etext;
- .stacks :
+ .stacks (NOLOAD) :
{
. = ALIGN(8);
__stacks_base__ = .;
@@ -132,7 +132,7 @@ SECTIONS
PROVIDE(_edata = .);
} > DATA_RAM AT > flash
- .bss : ALIGN(4)
+ .bss (NOLOAD) : ALIGN(4)
{
. = ALIGN(4);
PROVIDE(_bss_start = .);
diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/rules_stacks.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/rules_stacks.ld
index 5993da95f..087f913fa 100644
--- a/os/common/startup/ARMCMx/compilers/GCC/ld/rules_stacks.ld
+++ b/os/common/startup/ARMCMx/compilers/GCC/ld/rules_stacks.ld
@@ -17,7 +17,7 @@
SECTIONS
{
/* Special section for exceptions stack.*/
- .mstack :
+ .mstack (NOLOAD) :
{
. = ALIGN(8);
__main_stack_base__ = .;
@@ -27,7 +27,7 @@ SECTIONS
} > MAIN_STACK_RAM
/* Special section for process stack.*/
- .pstack :
+ .pstack (NOLOAD) :
{
__process_stack_base__ = .;
__main_thread_stack_base__ = .;
diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/arm-none-eabi.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/arm-none-eabi.mk
new file mode 100644
index 000000000..5df5fe29c
--- /dev/null
+++ b/os/common/startup/ARMCMx/compilers/GCC/mk/arm-none-eabi.mk
@@ -0,0 +1,23 @@
+##############################################################################
+# Compiler settings
+#
+
+TRGT = arm-none-eabi-
+CC = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+# runtime support makes code size explode.
+LD = $(TRGT)gcc
+#LD = $(TRGT)g++
+CP = $(TRGT)objcopy
+AS = $(TRGT)gcc -x assembler-with-cpp
+AR = $(TRGT)ar
+OD = $(TRGT)objdump
+SZ = $(TRGT)size
+HEX = $(CP) -O ihex
+BIN = $(CP) -O binary
+
+#
+# Compiler settings
+##############################################################################
diff --git a/os/common/startup/ARMCMx/compilers/GCC/rules.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/rules.mk
index d32a6bb1e..77b7434b0 100644
--- a/os/common/startup/ARMCMx/compilers/GCC/rules.mk
+++ b/os/common/startup/ARMCMx/compilers/GCC/mk/rules.mk
@@ -86,24 +86,16 @@ ifdef SREC
endif
# Source files groups and paths
-ifeq ($(USE_THUMB),yes)
- TCSRC += $(CSRC)
- TCPPSRC += $(CPPSRC)
-else
- ACSRC += $(CSRC)
- ACPPSRC += $(CPPSRC)
-endif
-ASRC := $(ACSRC) $(ACPPSRC)
+TCSRC += $(CSRC)
+TCPPSRC += $(CPPSRC)
TSRC := $(TCSRC) $(TCPPSRC)
-SRCPATHS := $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(ASRC)) $(dir $(TSRC)))
+SRCPATHS := $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(TSRC)))
# Various directories
OBJDIR := $(BUILDDIR)/obj
LSTDIR := $(BUILDDIR)/lst
# Object files groups
-ACOBJS := $(addprefix $(OBJDIR)/, $(notdir $(ACSRC:.c=.o)))
-ACPPOBJS := $(addprefix $(OBJDIR)/, $(notdir $(ACPPSRC:.cpp=.o)))
TCOBJS := $(addprefix $(OBJDIR)/, $(notdir $(TCSRC:.c=.o)))
TCPPOBJS := $(addprefix $(OBJDIR)/, $(notdir $(TCPPSRC:.cpp=.o)))
ASMOBJS := $(addprefix $(OBJDIR)/, $(notdir $(ASMSRC:.s=.o)))
@@ -131,36 +123,6 @@ CFLAGS = $(MCFLAGS) $(OPT) $(COPT) $(CWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:
CPPFLAGS = $(MCFLAGS) $(OPT) $(CPPOPT) $(CPPWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.cpp=.lst)) $(DEFS)
LDFLAGS = $(MCFLAGS) $(OPT) -nostartfiles $(LLIBDIR) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch,--library-path=$(RULESPATH)/ld,--script=$(LDSCRIPT)$(LDOPT)
-# Thumb interwork enabled only if needed because it kills performance.
-ifneq ($(strip $(TSRC)),)
- CFLAGS += -DTHUMB_PRESENT
- CPPFLAGS += -DTHUMB_PRESENT
- ASFLAGS += -DTHUMB_PRESENT
- ASXFLAGS += -DTHUMB_PRESENT
- ifneq ($(strip $(ASRC)),)
- # Mixed ARM and THUMB mode.
- CFLAGS += -mthumb-interwork
- CPPFLAGS += -mthumb-interwork
- ASFLAGS += -mthumb-interwork
- ASXFLAGS += -mthumb-interwork
- LDFLAGS += -mthumb-interwork
- else
- # Pure THUMB mode, THUMB C code cannot be called by ARM asm code directly.
- CFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING
- CPPFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING
- ASFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING -mthumb
- ASXFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING -mthumb
- LDFLAGS += -mno-thumb-interwork -mthumb
- endif
-else
- # Pure ARM mode
- CFLAGS += -mno-thumb-interwork
- CPPFLAGS += -mno-thumb-interwork
- ASFLAGS += -mno-thumb-interwork
- ASXFLAGS += -mno-thumb-interwork
- LDFLAGS += -mno-thumb-interwork
-endif
-
# Generate dependency information
ASFLAGS += -MD -MP -MF $(DEPDIR)/$(@F).d
ASXFLAGS += -MD -MP -MF $(DEPDIR)/$(@F).d
@@ -199,40 +161,22 @@ $(LSTDIR):
$(DEPDIR):
@mkdir -p $(DEPDIR)
-$(ACPPOBJS) : $(OBJDIR)/%.o : %.cpp $(MAKEFILE_LIST)
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
-endif
-
$(TCPPOBJS) : $(OBJDIR)/%.o : %.cpp $(MAKEFILE_LIST)
ifeq ($(USE_VERBOSE_COMPILE),yes)
@echo
- $(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
-endif
-
-$(ACOBJS) : $(OBJDIR)/%.o : %.c $(MAKEFILE_LIST)
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
+ $(CPPC) -c $(CPPFLAGS) -I. $(IINCDIR) $< -o $@
else
@echo Compiling $(<F)
- @$(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
+ @$(CPPC) -c $(CPPFLAGS) -I. $(IINCDIR) $< -o $@
endif
$(TCOBJS) : $(OBJDIR)/%.o : %.c $(MAKEFILE_LIST)
ifeq ($(USE_VERBOSE_COMPILE),yes)
@echo
- $(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
+ $(CC) -c $(CFLAGS) -I. $(IINCDIR) $< -o $@
else
@echo Compiling $(<F)
- @$(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
+ @$(CC) -c $(CFLAGS) -I. $(IINCDIR) $< -o $@
endif
$(ASMOBJS) : $(OBJDIR)/%.o : %.s $(MAKEFILE_LIST)
diff --git a/os/common/startup/e200/compilers/GCC/ld/rules_z0.ld b/os/common/startup/e200/compilers/GCC/ld/rules_z0.ld
index d76932870..e6cc68ea1 100644
--- a/os/common/startup/e200/compilers/GCC/ld/rules_z0.ld
+++ b/os/common/startup/e200/compilers/GCC/ld/rules_z0.ld
@@ -23,12 +23,12 @@ ENTRY(_reset_address)
SECTIONS
{
. = ORIGIN(flash);
- .boot0 : ALIGN(16) SUBALIGN(16)
+ .boot0 : ALIGN(16)
{
KEEP(*(.boot))
} > flash
- .boot1 : ALIGN(16) SUBALIGN(16)
+ .boot1 : ALIGN(16)
{
KEEP(*(.handlers))
KEEP(*(.crt0))
@@ -41,7 +41,7 @@ SECTIONS
KEEP(*(.ivors))
} > flash
- constructors : ALIGN(4) SUBALIGN(4)
+ constructors : ALIGN(4)
{
PROVIDE(__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
@@ -49,7 +49,7 @@ SECTIONS
PROVIDE(__init_array_end = .);
} > flash
- destructors : ALIGN(4) SUBALIGN(4)
+ destructors : ALIGN(4)
{
PROVIDE(__fini_array_start = .);
KEEP(*(.fini_array))
@@ -57,21 +57,21 @@ SECTIONS
PROVIDE(__fini_array_end = .);
} > flash
- .text_vle : ALIGN(16) SUBALIGN(16)
+ .text_vle : ALIGN(16)
{
*(.text_vle)
*(.text_vle.*)
*(.gnu.linkonce.t_vle.*)
} > flash
- .text : ALIGN(16) SUBALIGN(16)
+ .text : ALIGN(16)
{
*(.text)
*(.text.*)
*(.gnu.linkonce.t.*)
} > flash
- .rodata : ALIGN(16) SUBALIGN(16)
+ .rodata : ALIGN(16)
{
*(.glue_7t)
*(.glue_7)
@@ -81,7 +81,7 @@ SECTIONS
*(.rodata1)
} > flash
- .sdata2 : ALIGN(16) SUBALIGN(16)
+ .sdata2 : ALIGN(16)
{
__sdata2_start__ = . + 0x8000;
*(.sdata2)
@@ -102,12 +102,12 @@ SECTIONS
*(.eh_frame)
} > flash
- .romdata : ALIGN(16) SUBALIGN(16)
+ .romdata : ALIGN(16)
{
__romdata_start__ = .;
} > flash
- .stacks : ALIGN(16) SUBALIGN(16)
+ .stacks (NOLOAD) : ALIGN(16)
{
. = ALIGN(8);
__irq_stack_base__ = .;
@@ -136,7 +136,7 @@ SECTIONS
__data_end__ = .;
} > ram
- .sbss :
+ .sbss (NOLOAD) :
{
__bss_start__ = .;
*(.sbss)
@@ -145,7 +145,7 @@ SECTIONS
*(.scommon)
} > ram
- .bss :
+ .bss (NOLOAD) :
{
*(.bss)
*(.bss.*)
diff --git a/os/common/startup/e200/compilers/GCC/ld/rules_z3.ld b/os/common/startup/e200/compilers/GCC/ld/rules_z3.ld
index bb4c6ecb3..cda44ab1d 100644
--- a/os/common/startup/e200/compilers/GCC/ld/rules_z3.ld
+++ b/os/common/startup/e200/compilers/GCC/ld/rules_z3.ld
@@ -23,13 +23,13 @@ ENTRY(_reset_address)
SECTIONS
{
. = ORIGIN(flash);
- .boot0 : ALIGN(16) SUBALIGN(16)
+ .boot0 : ALIGN(16)
{
__ivpr_base__ = .;
KEEP(*(.boot))
} > flash
- .boot1 : ALIGN(16) SUBALIGN(16)
+ .boot1 : ALIGN(16)
{
KEEP(*(.handlers))
KEEP(*(.crt0))
@@ -38,7 +38,7 @@ SECTIONS
KEEP(*(.vectors))
} > flash
- constructors : ALIGN(4) SUBALIGN(4)
+ constructors : ALIGN(4)
{
PROVIDE(__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
@@ -46,7 +46,7 @@ SECTIONS
PROVIDE(__init_array_end = .);
} > flash
- destructors : ALIGN(4) SUBALIGN(4)
+ destructors : ALIGN(4)
{
PROVIDE(__fini_array_start = .);
KEEP(*(.fini_array))
@@ -54,21 +54,21 @@ SECTIONS
PROVIDE(__fini_array_end = .);
} > flash
- .text_vle : ALIGN(16) SUBALIGN(16)
+ .text_vle : ALIGN(16)
{
*(.text_vle)
*(.text_vle.*)
*(.gnu.linkonce.t_vle.*)
} > flash
- .text : ALIGN(16) SUBALIGN(16)
+ .text : ALIGN(16)
{
*(.text)
*(.text.*)
*(.gnu.linkonce.t.*)
} > flash
- .rodata : ALIGN(16) SUBALIGN(16)
+ .rodata : ALIGN(16)
{
*(.glue_7t)
*(.glue_7)
@@ -78,7 +78,7 @@ SECTIONS
*(.rodata1)
} > flash
- .sdata2 : ALIGN(16) SUBALIGN(16)
+ .sdata2 : ALIGN(16)
{
__sdata2_start__ = . + 0x8000;
*(.sdata2)
@@ -99,12 +99,12 @@ SECTIONS
*(.eh_frame)
} > flash
- .romdata : ALIGN(16) SUBALIGN(16)
+ .romdata : ALIGN(16)
{
__romdata_start__ = .;
} > flash
- .stacks : ALIGN(16) SUBALIGN(16)
+ .stacks (NOLOAD) : ALIGN(16)
{
. = ALIGN(8);
__irq_stack_base__ = .;
@@ -133,7 +133,7 @@ SECTIONS
__data_end__ = .;
} > ram
- .sbss :
+ .sbss (NOLOAD) :
{
__bss_start__ = .;
*(.sbss)
@@ -142,7 +142,7 @@ SECTIONS
*(.scommon)
} > ram
- .bss :
+ .bss (NOLOAD) :
{
*(.bss)
*(.bss.*)
diff --git a/os/common/startup/e200/compilers/GCC/ld/rules_z4.ld b/os/common/startup/e200/compilers/GCC/ld/rules_z4.ld
index bb4c6ecb3..cda44ab1d 100644
--- a/os/common/startup/e200/compilers/GCC/ld/rules_z4.ld
+++ b/os/common/startup/e200/compilers/GCC/ld/rules_z4.ld
@@ -23,13 +23,13 @@ ENTRY(_reset_address)
SECTIONS
{
. = ORIGIN(flash);
- .boot0 : ALIGN(16) SUBALIGN(16)
+ .boot0 : ALIGN(16)
{
__ivpr_base__ = .;
KEEP(*(.boot))
} > flash
- .boot1 : ALIGN(16) SUBALIGN(16)
+ .boot1 : ALIGN(16)
{
KEEP(*(.handlers))
KEEP(*(.crt0))
@@ -38,7 +38,7 @@ SECTIONS
KEEP(*(.vectors))
} > flash
- constructors : ALIGN(4) SUBALIGN(4)
+ constructors : ALIGN(4)
{
PROVIDE(__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
@@ -46,7 +46,7 @@ SECTIONS
PROVIDE(__init_array_end = .);
} > flash
- destructors : ALIGN(4) SUBALIGN(4)
+ destructors : ALIGN(4)
{
PROVIDE(__fini_array_start = .);
KEEP(*(.fini_array))
@@ -54,21 +54,21 @@ SECTIONS
PROVIDE(__fini_array_end = .);
} > flash
- .text_vle : ALIGN(16) SUBALIGN(16)
+ .text_vle : ALIGN(16)
{
*(.text_vle)
*(.text_vle.*)
*(.gnu.linkonce.t_vle.*)
} > flash
- .text : ALIGN(16) SUBALIGN(16)
+ .text : ALIGN(16)
{
*(.text)
*(.text.*)
*(.gnu.linkonce.t.*)
} > flash
- .rodata : ALIGN(16) SUBALIGN(16)
+ .rodata : ALIGN(16)
{
*(.glue_7t)
*(.glue_7)
@@ -78,7 +78,7 @@ SECTIONS
*(.rodata1)
} > flash
- .sdata2 : ALIGN(16) SUBALIGN(16)
+ .sdata2 : ALIGN(16)
{
__sdata2_start__ = . + 0x8000;
*(.sdata2)
@@ -99,12 +99,12 @@ SECTIONS
*(.eh_frame)
} > flash
- .romdata : ALIGN(16) SUBALIGN(16)
+ .romdata : ALIGN(16)
{
__romdata_start__ = .;
} > flash
- .stacks : ALIGN(16) SUBALIGN(16)
+ .stacks (NOLOAD) : ALIGN(16)
{
. = ALIGN(8);
__irq_stack_base__ = .;
@@ -133,7 +133,7 @@ SECTIONS
__data_end__ = .;
} > ram
- .sbss :
+ .sbss (NOLOAD) :
{
__bss_start__ = .;
*(.sbss)
@@ -142,7 +142,7 @@ SECTIONS
*(.scommon)
} > ram
- .bss :
+ .bss (NOLOAD) :
{
*(.bss)
*(.bss.*)