aboutsummaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
* hal_lld_init() configures peripherals as not-secureedolomb2018-01-151-0/+11
* Fixed Bugsedolomb2018-01-152-6/+13
* Updated EX demos to be compliant with latest ChibiOS/HAL editRocco Marco Guglielmi2018-01-1414-133/+138
* Fixed build problem.Giovanni Di Sirio2018-01-144-14/+13
* Fixes and notes.Giovanni Di Sirio2018-01-141-7/+7
* Release note draft.Giovanni Di Sirio2018-01-141-77/+118
* Merged last WolfSSL patch.Giovanni Di Sirio2018-01-142-1/+3
* Various fixes after mass test-compile.Giovanni Di Sirio2018-01-147-9/+11
* Fixed broken changes.Giovanni Di Sirio2018-01-141-6/+22
* fixed missing check for HAL_USE_SDMMCareviu2018-01-139-0/+38
* More ADCv4 code.Giovanni Di Sirio2018-01-125-672/+325
* update SDMMC driver and added test hal projectareviu2018-01-1129-155/+3107
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11263 35acf78f-673a-041...Giovanni Di Sirio2018-01-114-166/+96
* Added STM32 ADCv4 placeholders.Giovanni Di Sirio2018-01-116-3/+1849
* Added RTC and WDG support to H7.Giovanni Di Sirio2018-01-113-4/+14
* ST time source is now configurable between PIT, TC0 and TC1.isiora2018-01-101-0/+102
* Init PMC and Matrix only if SAMA_HAL_IS_SECURE is true.isiora2018-01-101-2/+3
* Added ST driver settingsisiora2018-01-101-0/+7
* SECUMOD Demoedolomb2018-01-1010-0/+1939
* Enabled ARM cycle counteredolomb2018-01-101-0/+9
* PORT_SUPPORTS_RT for Cortex-A5 and Cortex-A9edolomb2018-01-101-1/+24
* Changed memory from 64 KB to 128 KBedolomb2018-01-101-2/+2
* Clearing pending interrupts in aicInit()edolomb2018-01-101-0/+41
* Added INTERRUPT SOURCE TYPE mode macrosedolomb2018-01-101-0/+27
* Included sama_secumod.hedolomb2018-01-101-0/+1
* Added SECUMOD driveredolomb2018-01-101-0/+1
* Added pmc functions for SECUMODedolomb2018-01-101-0/+14
* SECUMOD Driveredolomb2018-01-102-0/+1122
* SPIv1 and SPIv2 circular mode added. Rework of RCC files and all dependencies...Giovanni Di Sirio2018-01-1070-1546/+972
* Enabled ARM cycle counteredolomb2018-01-101-0/+9
* PORT_SUPPORTS_RT for Cortex-A5 and Cortex-A9edolomb2018-01-101-1/+24
* Polled exchange added to SPIv3.Giovanni Di Sirio2018-01-102-22/+32
* Added checks related to SPI circular mode.Giovanni Di Sirio2018-01-092-0/+5
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11242 35acf78f-673a-041...Giovanni Di Sirio2018-01-097-41/+326
* More fixes, ready for testing.Giovanni Di Sirio2018-01-091-55/+88
* Various fixes in the new STM32F7xx support code.Giovanni Di Sirio2018-01-096-134/+362
* Added stub of STM32 I2Cv3 driver for STM32H7xx.Giovanni Di Sirio2018-01-086-6/+1636
* More compiler portability headers.Giovanni Di Sirio2018-01-082-0/+258
* Undid some changes.Giovanni Di Sirio2018-01-083-0/+29
* Updated names.Giovanni Di Sirio2018-01-081-4/+4
* Added SRAMs cache settings to STM32H7 mcuconf.h.Giovanni Di Sirio2018-01-084-1/+63
* Unified MPU handler.Giovanni Di Sirio2018-01-0815-7/+238
* Added unified cache handler for Cortex-M devices.Giovanni Di Sirio2018-01-0811-208/+150
* Added BDMA support to the STM32H7xx port.Giovanni Di Sirio2018-01-0714-255/+1329
* first draft. initialization workingareviu2018-01-0724-0/+8312
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11230 35acf78f-673a-041...Giovanni Di Sirio2018-01-061-0/+303
* Improved scatter file for STM32H743.Giovanni Di Sirio2018-01-061-15/+18
* Added stub cache handling functions to the STM32 DMAv1 driver.Giovanni Di Sirio2018-01-051-0/+28
* Added portability include path to the various startup.mk files.Giovanni Di Sirio2018-01-0522-23/+45
* SPI driver works, probably optimizations are possible.Giovanni Di Sirio2018-01-054-6/+12
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-07 13:04:19 +0000