aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorGiovanni Di Sirio <gdisirio@gmail.com>2018-01-14 09:34:28 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2018-01-14 09:34:28 +0000
commitecd03e17cec7c9d2d928314d59e9d4ed427f74c3 (patch)
tree3ad9582def8ebc7914b63f028b0a26f5629cae83
parent3ae66789001a8625881c5e10c96e382626478993 (diff)
downloadChibiOS-ecd03e17cec7c9d2d928314d59e9d4ed427f74c3.tar.gz
ChibiOS-ecd03e17cec7c9d2d928314d59e9d4ed427f74c3.tar.bz2
ChibiOS-ecd03e17cec7c9d2d928314d59e9d4ed427f74c3.zip
Various fixes after mass test-compile.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11268 35acf78f-673a-0410-8e92-d51de3d6d3f4
-rw-r--r--demos/STM32/RT-STM32-LWIP-FATFS-USB/cfg-stm32f107_goldbull/portab.c4
-rwxr-xr-xdemos/STM32/RT-STM32F103-OLIMEX_STM32_P103-FATFS/main.c4
-rw-r--r--demos/STM32/RT-STM32H743I-NUCLEO144/halconf.h2
-rw-r--r--os/hal/ports/LPC/LPC214x/hal_pal_lld.c1
-rw-r--r--os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c1
-rw-r--r--os/hal/ports/STM32/STM32F7xx/stm32_rcc.h2
-rw-r--r--os/hal/src/hal_usb.c6
7 files changed, 11 insertions, 9 deletions
diff --git a/demos/STM32/RT-STM32-LWIP-FATFS-USB/cfg-stm32f107_goldbull/portab.c b/demos/STM32/RT-STM32-LWIP-FATFS-USB/cfg-stm32f107_goldbull/portab.c
index f7690df80..9a123819a 100644
--- a/demos/STM32/RT-STM32-LWIP-FATFS-USB/cfg-stm32f107_goldbull/portab.c
+++ b/demos/STM32/RT-STM32-LWIP-FATFS-USB/cfg-stm32f107_goldbull/portab.c
@@ -30,10 +30,10 @@
/*===========================================================================*/
/* Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first).*/
-static const SPIConfig hs_spicfg = {NULL, IOPORT3, GPIOC_SPI3_SD_CS, 0, 0};
+static const SPIConfig hs_spicfg = {false, NULL, IOPORT3, GPIOC_SPI3_SD_CS, 0, 0};
/* Low speed SPI configuration (281.250kHz, CPHA=0, CPOL=0, MSb first).*/
-static const SPIConfig ls_spicfg = {NULL, IOPORT3, GPIOC_SPI3_SD_CS,
+static const SPIConfig ls_spicfg = {false, NULL, IOPORT3, GPIOC_SPI3_SD_CS,
SPI_CR1_BR_2 | SPI_CR1_BR_1,
0};
diff --git a/demos/STM32/RT-STM32F103-OLIMEX_STM32_P103-FATFS/main.c b/demos/STM32/RT-STM32F103-OLIMEX_STM32_P103-FATFS/main.c
index b9b7289ba..20c5f5b1d 100755
--- a/demos/STM32/RT-STM32F103-OLIMEX_STM32_P103-FATFS/main.c
+++ b/demos/STM32/RT-STM32F103-OLIMEX_STM32_P103-FATFS/main.c
@@ -106,10 +106,10 @@ static FATFS SDC_FS;
static bool fs_ready = FALSE;
/* Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first).*/
-static SPIConfig hs_spicfg = {NULL, IOPORT2, GPIOB_SPI2NSS, 0, 0};
+static SPIConfig hs_spicfg = {false, NULL, IOPORT2, GPIOB_SPI2NSS, 0, 0};
/* Low speed SPI configuration (281.250kHz, CPHA=0, CPOL=0, MSb first).*/
-static SPIConfig ls_spicfg = {NULL, IOPORT2, GPIOB_SPI2NSS,
+static SPIConfig ls_spicfg = {false, NULL, IOPORT2, GPIOB_SPI2NSS,
SPI_CR1_BR_2 | SPI_CR1_BR_1,
0};
diff --git a/demos/STM32/RT-STM32H743I-NUCLEO144/halconf.h b/demos/STM32/RT-STM32H743I-NUCLEO144/halconf.h
index d7793e22c..1a1fdd7d1 100644
--- a/demos/STM32/RT-STM32H743I-NUCLEO144/halconf.h
+++ b/demos/STM32/RT-STM32H743I-NUCLEO144/halconf.h
@@ -41,7 +41,7 @@
* @brief Enables the ADC subsystem.
*/
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
-#define HAL_USE_ADC FALSE
+#define HAL_USE_ADC TRUE
#endif
/**
diff --git a/os/hal/ports/LPC/LPC214x/hal_pal_lld.c b/os/hal/ports/LPC/LPC214x/hal_pal_lld.c
index 162c5348e..5903df2ea 100644
--- a/os/hal/ports/LPC/LPC214x/hal_pal_lld.c
+++ b/os/hal/ports/LPC/LPC214x/hal_pal_lld.c
@@ -100,6 +100,7 @@ void _pal_lld_setgroupmode(ioportid_t port,
break;
case PAL_MODE_UNCONNECTED:
port->FIO_PIN |= mask;
+ /* Falls through.*/
case PAL_MODE_OUTPUT_PUSHPULL:
port->FIO_DIR |= mask;
break;
diff --git a/os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c b/os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c
index 9f5a56952..9f8bde707 100644
--- a/os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c
+++ b/os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c
@@ -588,6 +588,7 @@ void usb_lld_init_endpoint(USBDriver *usbp, usbep_t ep) {
#else
osalDbgAssert(false, "isochronous support disabled");
#endif
+ /* Falls through.*/
case USB_EP_MODE_TYPE_BULK:
epr = EPR_EP_TYPE_BULK;
break;
diff --git a/os/hal/ports/STM32/STM32F7xx/stm32_rcc.h b/os/hal/ports/STM32/STM32F7xx/stm32_rcc.h
index f0c7dfb99..094d6900f 100644
--- a/os/hal/ports/STM32/STM32F7xx/stm32_rcc.h
+++ b/os/hal/ports/STM32/STM32F7xx/stm32_rcc.h
@@ -528,7 +528,7 @@
*/
#define rccEnableETH(lp) rccEnableAHB1(RCC_AHB1ENR_ETHMACEN | \
RCC_AHB1ENR_ETHMACTXEN | \
- RCC_AHB1ENR_ETHMACRXEN)
+ RCC_AHB1ENR_ETHMACRXEN, lp)
/**
* @brief Disables the ETH peripheral clock.
diff --git a/os/hal/src/hal_usb.c b/os/hal/src/hal_usb.c
index 40bb74496..af8042e31 100644
--- a/os/hal/src/hal_usb.c
+++ b/os/hal/src/hal_usb.c
@@ -892,7 +892,7 @@ void _usb_ep0in(USBDriver *usbp, usbep_t ep) {
usbp->ep0state = USB_EP0_IN_WAITING_TX0;
return;
}
- /* Falls into, it is intentional.*/
+ /* Falls through.*/
case USB_EP0_IN_WAITING_TX0:
/* Transmit phase over, receiving the zero sized status packet.*/
usbp->ep0state = USB_EP0_OUT_WAITING_STS;
@@ -916,7 +916,7 @@ void _usb_ep0in(USBDriver *usbp, usbep_t ep) {
case USB_EP0_OUT_RX:
/* All the above are invalid states in the IN phase.*/
osalDbgAssert(false, "EP0 state machine error");
- /* Falling through is intentional.*/
+ /* Falls through.*/
case USB_EP0_ERROR:
/* Error response, the state machine goes into an error state, the low
level layer will have to reset it to USB_EP0_WAITING_SETUP after
@@ -975,7 +975,7 @@ void _usb_ep0out(USBDriver *usbp, usbep_t ep) {
case USB_EP0_IN_SENDING_STS:
/* All the above are invalid states in the IN phase.*/
osalDbgAssert(false, "EP0 state machine error");
- /* Falling through is intentional.*/
+ /* Falls through.*/
case USB_EP0_ERROR:
/* Error response, the state machine goes into an error state, the low
level layer will have to reset it to USB_EP0_WAITING_SETUP after