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authorGiovanni Di Sirio <gdisirio@gmail.com>2018-01-05 10:08:52 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2018-01-05 10:08:52 +0000
commitdff9e162855eaafe4aa6e2d6d9f4ad48a0ac85a5 (patch)
tree5e70924c52529e39aa171492351a49e2804b9710
parent58613c9052eed88a010eb8bf42ade514655c904e (diff)
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SPI driver works, probably optimizations are possible.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11226 35acf78f-673a-0410-8e92-d51de3d6d3f4
-rw-r--r--os/hal/ports/STM32/LLD/DMAv2/stm32_dma.h1
-rw-r--r--os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.c10
-rw-r--r--os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.h2
-rwxr-xr-xtesthal/STM32/multi/SPI/main.c5
4 files changed, 12 insertions, 6 deletions
diff --git a/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.h b/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.h
index 3d8c08f13..4e714ad49 100644
--- a/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.h
+++ b/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.h
@@ -138,6 +138,7 @@
#define STM32_DMA_CR_TEIE DMA_SxCR_TEIE
#define STM32_DMA_CR_HTIE DMA_SxCR_HTIE
#define STM32_DMA_CR_TCIE DMA_SxCR_TCIE
+#define STM32_DMA_CR_PFCTRL DMA_SxCR_PFCTRL
#define STM32_DMA_CR_DIR_MASK DMA_SxCR_DIR
#define STM32_DMA_CR_DIR_P2M 0
#define STM32_DMA_CR_DIR_M2P DMA_SxCR_DIR_0
diff --git a/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.c b/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.c
index 1bcdbbe24..38cbb3f8b 100644
--- a/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.c
+++ b/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.c
@@ -15,7 +15,7 @@
*/
/**
- * @file SPIv2/hal_spi_lld.c
+ * @file SPIv3/hal_spi_lld.c
* @brief STM32 SPI subsystem low level driver source.
*
* @addtogroup SPI
@@ -523,7 +523,7 @@ void spi_lld_start(SPIDriver *spip) {
}
/* Configuration-specific DMA setup.*/
- dsize = (spip->config->cfg2 & SPI_CFG1_DSIZE_Msk) + 1U;
+ dsize = (spip->config->cfg1 & SPI_CFG1_DSIZE_Msk) + 1U;
cfg1 = spip->config->cfg1 | SPI_CFG1_RXDMAEN | SPI_CFG1_TXDMAEN;
cfg1 &= ~SPI_CFG1_FTHLV_Msk;
if (dsize <= 8U) {
@@ -532,7 +532,7 @@ void spi_lld_start(SPIDriver *spip) {
STM32_DMA_CR_PSIZE_BYTE | STM32_DMA_CR_MSIZE_BYTE;
spip->txdmamode = (spip->txdmamode & ~STM32_DMA_CR_SIZE_MASK) |
STM32_DMA_CR_PSIZE_BYTE | STM32_DMA_CR_MSIZE_BYTE;
- cfg1 |= SPI_CFG1_FTHLV_2; /* FTHLV = 4.*/
+ cfg1 |= SPI_CFG1_FTHLV_VALUE(0);
}
else if (dsize <= 16U) {
/* Frame width is between 9 and 16 bits.*/
@@ -540,7 +540,7 @@ void spi_lld_start(SPIDriver *spip) {
STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
spip->txdmamode = (spip->txdmamode & ~STM32_DMA_CR_SIZE_MASK) |
STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
- cfg1 |= SPI_CFG1_FTHLV_1; /* FTHLV = 2.*/
+ cfg1 |= SPI_CFG1_FTHLV_VALUE(0);
}
else {
/* Frame width is between 16 and 32 bits.*/
@@ -548,7 +548,7 @@ void spi_lld_start(SPIDriver *spip) {
STM32_DMA_CR_PSIZE_WORD | STM32_DMA_CR_MSIZE_WORD;
spip->txdmamode = (spip->txdmamode & ~STM32_DMA_CR_SIZE_MASK) |
STM32_DMA_CR_PSIZE_WORD | STM32_DMA_CR_MSIZE_WORD;
- cfg1 |= SPI_CFG1_FTHLV_0; /* FTHLV = 1.*/
+ cfg1 |= SPI_CFG1_FTHLV_VALUE(0);
}
/* SPI setup and enable.*/
diff --git a/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.h b/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.h
index b6f78d74a..4945d444c 100644
--- a/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.h
+++ b/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.h
@@ -15,7 +15,7 @@
*/
/**
- * @file SPIv2/hal_spi_lld.h
+ * @file SPIv3/hal_spi_lld.h
* @brief STM32 SPI subsystem low level driver header.
*
* @addtogroup SPI
diff --git a/testhal/STM32/multi/SPI/main.c b/testhal/STM32/multi/SPI/main.c
index fd1d74250..f41e17fc0 100755
--- a/testhal/STM32/multi/SPI/main.c
+++ b/testhal/STM32/multi/SPI/main.c
@@ -41,6 +41,8 @@ static THD_FUNCTION(spi_thread_1, p) {
spiExchange(&PORTAB_SPI1, 512,
txbuf, rxbuf); /* Atomic transfer operations. */
spiUnselect(&PORTAB_SPI1); /* Slave Select de-assertion. */
+ dmaBufferInvalidate(&txbuf[0], /* Cache invalidation over the */
+ sizeof txbuf); /* buffer. */
spiReleaseBus(&PORTAB_SPI1); /* Ownership release. */
}
}
@@ -61,6 +63,8 @@ static THD_FUNCTION(spi_thread_2, p) {
spiExchange(&PORTAB_SPI1, 512,
txbuf, rxbuf); /* Atomic transfer operations. */
spiUnselect(&PORTAB_SPI1); /* Slave Select de-assertion. */
+ dmaBufferInvalidate(&txbuf[0], /* Cache invalidation over the */
+ sizeof txbuf); /* buffer. */
spiReleaseBus(&PORTAB_SPI1); /* Ownership release. */
}
}
@@ -107,6 +111,7 @@ int main(void) {
*/
for (i = 0; i < sizeof(txbuf); i++)
txbuf[i] = (uint8_t)i;
+ dmaBufferFlush(&txbuf[0], sizeof txbuf);
/*
* Starting the transmitter and receiver threads.