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| author | edolomb <none@example.com> | 2018-01-10 17:01:44 +0000 |
|---|---|---|
| committer | edolomb <none@example.com> | 2018-01-10 17:01:44 +0000 |
| commit | 80f7aa6a99a76068d748e4c5d83387a1b252b2fa (patch) | |
| tree | 7fded08274eb326bae8ad3db0844a3df4f9bf5b3 | |
| parent | 77196a43a80c235b8b3bc9a1b93fbf52882223c6 (diff) | |
| download | ChibiOS-80f7aa6a99a76068d748e4c5d83387a1b252b2fa.tar.gz ChibiOS-80f7aa6a99a76068d748e4c5d83387a1b252b2fa.tar.bz2 ChibiOS-80f7aa6a99a76068d748e4c5d83387a1b252b2fa.zip | |
Enabled ARM cycle counter
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11256 35acf78f-673a-0410-8e92-d51de3d6d3f4
| -rw-r--r-- | os/common/startup/ARM/devices/SAMA5D2/boot.S | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/os/common/startup/ARM/devices/SAMA5D2/boot.S b/os/common/startup/ARM/devices/SAMA5D2/boot.S index 2de5be0f2..1e7809f24 100644 --- a/os/common/startup/ARM/devices/SAMA5D2/boot.S +++ b/os/common/startup/ARM/devices/SAMA5D2/boot.S @@ -76,6 +76,15 @@ Boot_Handler: ldr r1, =SFR_L2CC_HRAMC str r0, [r1] b Reset_Handler + /* + * Enabling Cycle counter + */ + mrc p15, 0, r0, c9, c12, 0 // read PMCR register + orr r0, r0, #(0x1) // set E bit 0 to enable counter + mcr p15, 0, r0, c9, c12, 0 // write r0 + mrc p15, 0, r0, c9, c12, 1 // read PMCNTENSET register + orr r0, r0, #(0x1 << 31) // set bit 31 to enable counter + mcr p15, 0, r0, c9, c12, 1 // write r0 #endif /* !defined(__DOXYGEN__) */ /** @} */ |