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Diffstat (limited to 'os/hal/ports/STM32/STM32F7xx/hal_lld.h')
-rw-r--r--os/hal/ports/STM32/STM32F7xx/hal_lld.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/os/hal/ports/STM32/STM32F7xx/hal_lld.h b/os/hal/ports/STM32/STM32F7xx/hal_lld.h
index 5645e0bc9..dcd5beadd 100644
--- a/os/hal/ports/STM32/STM32F7xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32F7xx/hal_lld.h
@@ -822,6 +822,14 @@
#if !defined(STM32_SDMMCSEL) || defined(__DOXYGEN__)
#define STM32_SDMMCSEL STM32_SDMMCSEL_PLL48CLK
#endif
+
+/**
+ * @brief SRAM2 cache-ability.
+ * @note This setting uses the MPU region 7 if at @p TRUE.
+ */
+#if !defined(STM32_SRAM2_NOCACHE) || defined(__DOXYGEN__)
+#define STM32_SRAM2_NOCACHE FALSE
+#endif
/** @} */
/*===========================================================================*/