diff options
Diffstat (limited to 'os/hal/platforms')
-rw-r--r-- | os/hal/platforms/STM32/adc_lld.c | 10 | ||||
-rw-r--r-- | os/hal/platforms/STM32/adc_lld.h | 26 | ||||
-rw-r--r-- | os/hal/platforms/STM32/pwm_lld.c | 18 | ||||
-rw-r--r-- | os/hal/platforms/STM32/pwm_lld.h | 20 | ||||
-rw-r--r-- | os/hal/platforms/STM32/stm32_dma.c | 13 | ||||
-rw-r--r-- | os/hal/platforms/STM32/uart_lld.h | 3 |
6 files changed, 59 insertions, 31 deletions
diff --git a/os/hal/platforms/STM32/adc_lld.c b/os/hal/platforms/STM32/adc_lld.c index 7c7657a5c..c6db10346 100644 --- a/os/hal/platforms/STM32/adc_lld.c +++ b/os/hal/platforms/STM32/adc_lld.c @@ -66,9 +66,9 @@ CH_IRQ_HANDLER(DMA1_Ch1_IRQHandler) { dmaClearChannel(STM32_DMA1, STM32_DMA_CHANNEL_1);
if ((isr & DMA_ISR_HTIF1) != 0) {
/* Half transfer processing.*/
- if (ADCD1.ad_callback != NULL) {
+ if (ADCD1.ad_grpp->acg_callback != NULL) {
/* Invokes the callback passing the 1st half of the buffer.*/
- ADCD1.ad_callback(ADCD1.ad_samples, ADCD1.ad_depth / 2);
+ ADCD1.ad_grpp->acg_callback(&ADCD1, ADCD1.ad_samples, ADCD1.ad_depth / 2);
}
}
if ((isr & DMA_ISR_TCIF1) != 0) {
@@ -85,15 +85,15 @@ CH_IRQ_HANDLER(DMA1_Ch1_IRQHandler) { #endif
}
/* Callback handling.*/
- if (ADCD1.ad_callback != NULL) {
+ if (ADCD1.ad_grpp->acg_callback != NULL) {
if (ADCD1.ad_depth > 1) {
/* Invokes the callback passing the 2nd half of the buffer.*/
size_t half = ADCD1.ad_depth / 2;
- ADCD1.ad_callback(ADCD1.ad_samples + half, half);
+ ADCD1.ad_grpp->acg_callback(&ADCD1, ADCD1.ad_samples + half, half);
}
else {
/* Invokes the callback passing the whole buffer.*/
- ADCD1.ad_callback(ADCD1.ad_samples, ADCD1.ad_depth);
+ ADCD1.ad_grpp->acg_callback(&ADCD1, ADCD1.ad_samples, ADCD1.ad_depth);
}
}
}
diff --git a/os/hal/platforms/STM32/adc_lld.h b/os/hal/platforms/STM32/adc_lld.h index 7fe219706..a72ce67f3 100644 --- a/os/hal/platforms/STM32/adc_lld.h +++ b/os/hal/platforms/STM32/adc_lld.h @@ -115,12 +115,19 @@ typedef uint16_t adcsample_t; typedef uint16_t adc_channels_num_t;
/**
+ * @brief Type of a structure representing an ADC driver.
+ */
+typedef struct ADCDriver ADCDriver;
+
+/**
* @brief ADC notification callback type.
*
+ * @param[in] adcp pointer to the @p ADCDriver object triggering the
+ * callback
* @param[in] buffer pointer to the most recent samples data
* @param[in] n number of buffer rows available starting from @p buffer
*/
-typedef void (*adccallback_t)(adcsample_t *buffer, size_t n);
+typedef void (*adccallback_t)(ADCDriver *adcp, adcsample_t *buffer, size_t n);
/**
* @brief Conversion group configuration structure.
@@ -139,6 +146,10 @@ typedef struct { * @brief Number of the analog channels belonging to the conversion group.
*/
adc_channels_num_t acg_num_channels;
+ /**
+ * @brief Callback function associated to the group or @p NULL.
+ */
+ adccallback_t acg_callback;
/* End of the mandatory fields.*/
/**
* @brief ADC CR1 register initialization data.
@@ -185,7 +196,7 @@ typedef struct { /**
* @brief Structure representing an ADC driver.
*/
-typedef struct {
+struct ADCDriver {
/**
* @brief Driver state.
*/
@@ -195,10 +206,6 @@ typedef struct { */
const ADCConfig *ad_config;
/**
- * @brief Current callback function or @p NULL.
- */
- adccallback_t ad_callback;
- /**
* @brief Current samples buffer pointer or @p NULL.
*/
adcsample_t *ad_samples;
@@ -210,12 +217,15 @@ typedef struct { * @brief Current conversion group pointer or @p NULL.
*/
const ADCConversionGroup *ad_grpp;
-#if ADC_USE_WAIT
+#if ADC_USE_WAIT || defined(__DOXYGEN__)
/**
* @brief Synchronization semaphore.
*/
Semaphore ad_sem;
#endif
+#if defined(ADC_DRIVER_EXT_FIELDS)
+ ADC_DRIVER_EXT_FIELDS
+#endif
/* End of the mandatory fields.*/
/**
* @brief Pointer to the ADCx registers block.
@@ -229,7 +239,7 @@ typedef struct { * @brief DMA CCR register bit mask.
*/
uint32_t ad_dmaccr;
-} ADCDriver;
+};
/*===========================================================================*/
/* Driver macros. */
diff --git a/os/hal/platforms/STM32/pwm_lld.c b/os/hal/platforms/STM32/pwm_lld.c index eeb1282bd..6355c0d34 100644 --- a/os/hal/platforms/STM32/pwm_lld.c +++ b/os/hal/platforms/STM32/pwm_lld.c @@ -106,13 +106,13 @@ static void serve_interrupt(PWMDriver *pwmp) { pwmp->pd_tim->SR = ~(TIM_SR_CC1IF | TIM_SR_CC2IF | TIM_SR_CC3IF |
TIM_SR_CC4IF | TIM_SR_UIF);
if ((sr & TIM_SR_CC1IF) != 0)
- pwmp->pd_config->pc_channels[0].pcc_callback();
+ pwmp->pd_config->pc_channels[0].pcc_callback(pwmp);
if ((sr & TIM_SR_CC2IF) != 0)
- pwmp->pd_config->pc_channels[1].pcc_callback();
+ pwmp->pd_config->pc_channels[1].pcc_callback(pwmp);
if ((sr & TIM_SR_CC3IF) != 0)
- pwmp->pd_config->pc_channels[2].pcc_callback();
+ pwmp->pd_config->pc_channels[2].pcc_callback(pwmp);
if ((sr & TIM_SR_CC4IF) != 0)
- pwmp->pd_config->pc_channels[3].pcc_callback();
+ pwmp->pd_config->pc_channels[3].pcc_callback(pwmp);
if ((sr & TIM_SR_UIF) != 0)
pwmp->pd_config->pc_callback();
}
@@ -136,7 +136,7 @@ CH_IRQ_HANDLER(TIM1_UP_IRQHandler) { CH_IRQ_PROLOGUE();
TIM1->SR = ~TIM_SR_UIF;
- PWMD1.pd_config->pc_callback();
+ PWMD1.pd_config->pc_callback(&PWMD1);
CH_IRQ_EPILOGUE();
}
@@ -157,13 +157,13 @@ CH_IRQ_HANDLER(TIM1_CC_IRQHandler) { sr = TIM1->SR & TIM1->DIER;
TIM1->SR = ~(TIM_SR_CC1IF | TIM_SR_CC2IF | TIM_SR_CC3IF | TIM_SR_CC4IF);
if ((sr & TIM_SR_CC1IF) != 0)
- PWMD1.pd_config->pc_channels[0].pcc_callback();
+ PWMD1.pd_config->pc_channels[0].pcc_callback(&PWMD1);
if ((sr & TIM_SR_CC2IF) != 0)
- PWMD1.pd_config->pc_channels[1].pcc_callback();
+ PWMD1.pd_config->pc_channels[1].pcc_callback(&PWMD1);
if ((sr & TIM_SR_CC3IF) != 0)
- PWMD1.pd_config->pc_channels[2].pcc_callback();
+ PWMD1.pd_config->pc_channels[2].pcc_callback(&PWMD1);
if ((sr & TIM_SR_CC4IF) != 0)
- PWMD1.pd_config->pc_channels[3].pcc_callback();
+ PWMD1.pd_config->pc_channels[3].pcc_callback(&PWMD1);
CH_IRQ_EPILOGUE();
}
diff --git a/os/hal/platforms/STM32/pwm_lld.h b/os/hal/platforms/STM32/pwm_lld.h index 79606654d..b86ab1a8f 100644 --- a/os/hal/platforms/STM32/pwm_lld.h +++ b/os/hal/platforms/STM32/pwm_lld.h @@ -136,6 +136,18 @@ typedef uint8_t pwmchannel_t; typedef uint16_t pwmcnt_t;
/**
+ * @brief Type of a structure representing an PWM driver.
+ */
+typedef struct PWMDriver PWMDriver;
+
+/**
+ * @brief PWM notification callback type.
+ *
+ * @param[in] pwmp pointer to a @p PWMDriver object
+ */
+typedef void (*pwmcallback_t)(PWMDriver *pwmp);
+
+/**
* @brief PWM driver channel configuration structure.
* @note It could be empty on some architectures.
*/
@@ -155,7 +167,6 @@ typedef struct { /**
* @brief PWM driver configuration structure.
- * @note It could be empty on some architectures.
*/
typedef struct {
/**
@@ -187,7 +198,7 @@ typedef struct { /**
* @brief Structure representing a PWM driver.
*/
-typedef struct {
+struct PWMDriver {
/**
* @brief Driver state.
*/
@@ -196,6 +207,9 @@ typedef struct { * @brief Current driver configuration data.
*/
const PWMConfig *pd_config;
+#if defined(PWM_DRIVER_EXT_FIELDS)
+ PWM_DRIVER_EXT_FIELDS
+#endif
/* End of the mandatory fields.*/
/**
* @brief Bit mask of the enabled channels.
@@ -205,7 +219,7 @@ typedef struct { * @brief Pointer to the TIMx registers block.
*/
TIM_TypeDef *pd_tim;
-} PWMDriver;
+};
/*===========================================================================*/
/* Driver macros. */
diff --git a/os/hal/platforms/STM32/stm32_dma.c b/os/hal/platforms/STM32/stm32_dma.c index 995e33a12..bcdcf0fb7 100644 --- a/os/hal/platforms/STM32/stm32_dma.c +++ b/os/hal/platforms/STM32/stm32_dma.c @@ -18,8 +18,9 @@ */
/**
- * @file stm32_dma.c
- * @brief STM32 DMA helper driver code.
+ * @file stm32_dma.c
+ * @brief STM32 DMA helper driver code.
+ *
* @addtogroup STM32_DMA
* @{
*/
@@ -53,7 +54,7 @@ static cnt_t dmacnt2; /*===========================================================================*/
/**
- * @brief STM32 DMA helper initialization.
+ * @brief STM32 DMA helper initialization.
*
* @init
*/
@@ -73,9 +74,9 @@ void dmaInit(void) { }
/**
- * @brief Enables the specified DMA controller clock.
+ * @brief Enables the specified DMA controller clock.
*
- * @param[in] dma the DMA controller id
+ * @param[in] dma the DMA controller id
*
* @api
*/
@@ -102,7 +103,7 @@ void dmaEnable(uint32_t dma) { /**
* @brief Disables the specified DMA controller clock.
*
- * @param[in] dma the DMA controller id
+ * @param[in] dma the DMA controller id
*
* @api
*/
diff --git a/os/hal/platforms/STM32/uart_lld.h b/os/hal/platforms/STM32/uart_lld.h index d030c2970..7cac040ce 100644 --- a/os/hal/platforms/STM32/uart_lld.h +++ b/os/hal/platforms/STM32/uart_lld.h @@ -233,6 +233,9 @@ struct UARTDriver { uartrxstate_t ud_rxstate;
/** @brief UART driver status flags.*/
uartflags_t ud_flags;
+#if defined(UART_DRIVER_EXT_FIELDS)
+ UART_DRIVER_EXT_FIELDS
+#endif
/* End of the mandatory fields.*/
/** @brief Pointer to the USART registers block.*/
USART_TypeDef *ud_usart;
|