git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@5858 35acf78f-673a-0410-8e92-d51de3d6d3f4

1 files changed, 0 insertions, 147 deletions

diff --git a/testhal/STM32F0xx/SPI/mcuconf.h b/testhal/STM32F0xx/SPI/mcuconf.h
deleted file mode 100644
index cf60d78be..000000000
--- a/testhal/STM32F0xx/SPI/mcuconf.h
+++ /dev/null
@@ -1,147 +0,0 @@
-/*

-    ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio

-

-    Licensed under the Apache License, Version 2.0 (the "License");

-    you may not use this file except in compliance with the License.

-    You may obtain a copy of the License at

-

-        http://www.apache.org/licenses/LICENSE-2.0

-

-    Unless required by applicable law or agreed to in writing, software

-    distributed under the License is distributed on an "AS IS" BASIS,

-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

-    See the License for the specific language governing permissions and

-    limitations under the License.

-*/

-

-/*

- * STM32F0xx drivers configuration.

- * The following settings override the default settings present in

- * the various device driver implementation headers.

- * Note that the settings for each driver only have effect if the whole

- * driver is enabled in halconf.h.

- *

- * IRQ priorities:

- * 3...0       Lowest...Highest.

- *

- * DMA priorities:

- * 0...3        Lowest...Highest.

- */

-

-#define STM32F0xx_MCUCONF

-

-/*

- * HAL driver system settings.

- */

-#define STM32_NO_INIT                       FALSE

-#define STM32_PVD_ENABLE                    FALSE

-#define STM32_PLS                           STM32_PLS_LEV0

-#define STM32_HSI_ENABLED                   TRUE

-#define STM32_HSI14_ENABLED                 TRUE

-#define STM32_LSI_ENABLED                   TRUE

-#define STM32_HSE_ENABLED                   FALSE

-#define STM32_LSE_ENABLED                   FALSE

-#define STM32_SW                            STM32_SW_PLL

-#define STM32_PLLSRC                        STM32_PLLSRC_HSI

-#define STM32_PREDIV_VALUE                  1

-#define STM32_PLLMUL_VALUE                  12

-#define STM32_HPRE                          STM32_HPRE_DIV1

-#define STM32_PPRE                          STM32_PPRE_DIV1

-#define STM32_ADCSW                         STM32_ADCSW_HSI14

-#define STM32_ADCPRE                        STM32_ADCPRE_DIV4

-#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK

-#define STM32_ADCPRE                        STM32_ADCPRE_DIV4

-#define STM32_ADCSW                         STM32_ADCSW_HSI14

-#define STM32_CECSW                         STM32_CECSW_HSI

-#define STM32_I2C1SW                        STM32_I2C1SW_HSI

-#define STM32_USART1SW                      STM32_USART1SW_PCLK

-#define STM32_RTCSEL                        STM32_RTCSEL_LSI

-

-/*

- * ADC driver system settings.

- */

-#define STM32_ADC_USE_ADC1                  FALSE

-#define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              2

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     2

-

-/*

- * EXT driver system settings.

- */

-#define STM32_EXT_EXTI0_1_IRQ_PRIORITY      3

-#define STM32_EXT_EXTI2_3_IRQ_PRIORITY      3

-#define STM32_EXT_EXTI4_15_IRQ_PRIORITY     3

-#define STM32_EXT_EXTI16_IRQ_PRIORITY       3

-#define STM32_EXT_EXTI17_IRQ_PRIORITY       3

-

-/*

- * GPT driver system settings.

- */

-#define STM32_GPT_USE_TIM1                  FALSE

-#define STM32_GPT_USE_TIM2                  FALSE

-#define STM32_GPT_USE_TIM3                  FALSE

-#define STM32_GPT_TIM1_IRQ_PRIORITY         2

-#define STM32_GPT_TIM2_IRQ_PRIORITY         2

-#define STM32_GPT_TIM3_IRQ_PRIORITY         2

-

-/*

- * I2C driver system settings.

- */

-#define STM32_I2C_USE_I2C1                  FALSE

-#define STM32_I2C_USE_I2C2                  FALSE

-#define STM32_I2C_I2C1_IRQ_PRIORITY         10

-#define STM32_I2C_I2C2_IRQ_PRIORITY         10

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      chSysHalt()

-

-/*

- * ICU driver system settings.

- */

-#define STM32_ICU_USE_TIM1                  FALSE

-#define STM32_ICU_USE_TIM2                  FALSE

-#define STM32_ICU_USE_TIM3                  FALSE

-#define STM32_ICU_TIM1_IRQ_PRIORITY         3

-#define STM32_ICU_TIM2_IRQ_PRIORITY         3

-#define STM32_ICU_TIM3_IRQ_PRIORITY         3

-

-/*

- * PWM driver system settings.

- */

-#define STM32_PWM_USE_ADVANCED              FALSE

-#define STM32_PWM_USE_TIM1                  FALSE

-#define STM32_PWM_USE_TIM2                  FALSE

-#define STM32_PWM_USE_TIM3                  FALSE

-#define STM32_PWM_TIM1_IRQ_PRIORITY         3

-#define STM32_PWM_TIM2_IRQ_PRIORITY         3

-#define STM32_PWM_TIM3_IRQ_PRIORITY         3

-

-/*

- * SERIAL driver system settings.

- */

-#define STM32_SERIAL_USE_USART1             FALSE

-#define STM32_SERIAL_USE_USART2             FALSE

-#define STM32_SERIAL_USART1_PRIORITY        3

-#define STM32_SERIAL_USART2_PRIORITY        3

-

-/*

- * SPI driver system settings.

- */

-#define STM32_SPI_USE_SPI1                  TRUE

-#define STM32_SPI_USE_SPI2                  TRUE

-#define STM32_SPI_SPI1_DMA_PRIORITY         1

-#define STM32_SPI_SPI2_DMA_PRIORITY         1

-#define STM32_SPI_SPI1_IRQ_PRIORITY         2

-#define STM32_SPI_SPI2_IRQ_PRIORITY         2

-#define STM32_SPI_DMA_ERROR_HOOK(spip)      chSysHalt()

-

-/*

- * UART driver system settings.

- */

-#define STM32_UART_USE_USART1               FALSE

-#define STM32_UART_USE_USART2               FALSE

-#define STM32_UART_USART1_IRQ_PRIORITY      3

-#define STM32_UART_USART2_IRQ_PRIORITY      3

-#define STM32_UART_USART1_DMA_PRIORITY      0

-#define STM32_UART_USART2_DMA_PRIORITY      0

-#define STM32_UART_DMA_ERROR_HOOK(uartp)    chSysHalt()