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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2009-09-30 18:05:32 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2009-09-30 18:05:32 +0000 |
| commit | b55631f714a0469962883ac572e1910080de68fa (patch) | |
| tree | d94a5a57e5adc8fa5bceea1b89dc67bf95fcfa2e /os/io/platforms/AT91SAM7X/mii_lld.c | |
| parent | 3a397f9f5b3920339a7316e09379bc25dd5195a0 (diff) | |
| download | ChibiOS-b55631f714a0469962883ac572e1910080de68fa.tar.gz ChibiOS-b55631f714a0469962883ac572e1910080de68fa.tar.bz2 ChibiOS-b55631f714a0469962883ac572e1910080de68fa.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1195 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/io/platforms/AT91SAM7X/mii_lld.c')
| -rw-r--r-- | os/io/platforms/AT91SAM7X/mii_lld.c | 115 |
1 files changed, 115 insertions, 0 deletions
diff --git a/os/io/platforms/AT91SAM7X/mii_lld.c b/os/io/platforms/AT91SAM7X/mii_lld.c new file mode 100644 index 000000000..56fd87a51 --- /dev/null +++ b/os/io/platforms/AT91SAM7X/mii_lld.c @@ -0,0 +1,115 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file AT91SAM7X/mii_lld.c
+ * @brief AT91SAM7X low level MII driver code
+ * @addtogroup AT91SAM7X_MII
+ * @{
+ */
+
+#include <ch.h>
+#include <mac.h>
+#include <mii.h>
+
+/**
+ * @brief Low level MII driver initialization.
+ */
+void mii_lld_init(void) {
+
+}
+
+/**
+ * @brief Resets a PHY device.
+ *
+ * @param[in] macp pointer to the @p MACDriver object
+ */
+void mii_lld_reset(MACDriver *macp) {
+
+ /*
+ * Disables the pullups on all the pins that are latched on reset by the PHY.
+ * The status latched into the PHY is:
+ * PHYADDR = 00001
+ * PCS_LPBK = 0 (disabled)
+ * ISOLATE = 0 (disabled)
+ * RMIISEL = 0 (MII mode)
+ * RMIIBTB = 0 (BTB mode disabled)
+ * SPEED = 1 (100mbps)
+ * DUPLEX = 1 (full duplex)
+ * ANEG_EN = 1 (auto negotiation enabled)
+ */
+ AT91C_BASE_PIOB->PIO_PPUDR = PHY_LATCHED_PINS;
+
+#ifdef PIOB_PHY_PD_MASK
+ /*
+ * PHY power control.
+ */
+ AT91C_BASE_PIOB->PIO_OER = PIOB_PHY_PD_MASK; // Becomes an output.
+ AT91C_BASE_PIOB->PIO_PPUDR = PIOB_PHY_PD_MASK; // Default pullup disabled.
+ AT91C_BASE_PIOB->PIO_SODR = PIOB_PHY_PD_MASK; // Output to high level.
+#endif
+
+ /*
+ * PHY reset by pulsing the NRST pin.
+ */
+ AT91C_BASE_RSTC->RSTC_RMR = 0xA5000100;
+ AT91C_BASE_RSTC->RSTC_RCR = 0xA5000000 | AT91C_RSTC_EXTRST;
+ while (!(AT91C_BASE_RSTC->RSTC_RSR & AT91C_RSTC_NRSTL))
+ ;
+}
+
+/**
+ * @brief Reads a PHY register through the MII interface.
+ *
+ * @param[in] macp pointer to the @p MACDriver object
+ * @param addr the register address
+ * @return The register value.
+ */
+phyreg_t mii_lld_get(MACDriver *macp, phyaddr_t addr) {
+
+ AT91C_BASE_EMAC->EMAC_MAN = (0b01 << 30) | /* SOF */
+ (0b10 << 28) | /* RW */
+ (PHY_ADDRESS << 23) | /* PHYA */
+ (addr << 18) | /* REGA */
+ (0b10 << 16); /* CODE */
+ while (!( AT91C_BASE_EMAC->EMAC_NSR & AT91C_EMAC_IDLE))
+ ;
+ return (phyreg_t)(AT91C_BASE_EMAC->EMAC_MAN & 0xFFFF);
+}
+
+/**
+ * @brief Writes a PHY register through the MII interface.
+ *
+ * @param[in] macp pointer to the @p MACDriver object
+ * @param addr the register address
+ * @param value the new register value
+ */
+void mii_lld_put(MACDriver *macp, phyaddr_t addr, phyreg_t value) {
+
+ AT91C_BASE_EMAC->EMAC_MAN = (0b01 << 30) | /* SOF */
+ (0b01 << 28) | /* RW */
+ (PHY_ADDRESS << 23) | /* PHYA */
+ (addr << 18) | /* REGA */
+ (0b10 << 16) | /* CODE */
+ value;
+ while (!( AT91C_BASE_EMAC->EMAC_NSR & AT91C_EMAC_IDLE))
+ ;
+}
+
+/** @} */
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