diff options
| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2019-06-30 07:16:02 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2019-06-30 07:16:02 +0000 |
| commit | a9b5eab94a4e3b2e2bb9215111954e2845500d7a (patch) | |
| tree | 5062e78305bc54ab4b98ab12f08d2bebd5040703 /os/hal/ports/STM32/STM32L4xx+/hal_lld.c | |
| parent | e8fb1f777f38f1dc5368c03ff2990bd3404cfc18 (diff) | |
| download | ChibiOS-a9b5eab94a4e3b2e2bb9215111954e2845500d7a.tar.gz ChibiOS-a9b5eab94a4e3b2e2bb9215111954e2845500d7a.tar.bz2 ChibiOS-a9b5eab94a4e3b2e2bb9215111954e2845500d7a.zip | |
Fixed bug #1035.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/stable_19.1.x@12854 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
Diffstat (limited to 'os/hal/ports/STM32/STM32L4xx+/hal_lld.c')
| -rw-r--r-- | os/hal/ports/STM32/STM32L4xx+/hal_lld.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/os/hal/ports/STM32/STM32L4xx+/hal_lld.c b/os/hal/ports/STM32/STM32L4xx+/hal_lld.c index d62412170..5bc119b1e 100644 --- a/os/hal/ports/STM32/STM32L4xx+/hal_lld.c +++ b/os/hal/ports/STM32/STM32L4xx+/hal_lld.c @@ -333,8 +333,12 @@ void stm32_clock_init(void) { }
/* Set flash WS's for SYSCLK source */
- if (STM32_FLASHBITS > STM32_MSI_FLASHBITS)
+ if (STM32_FLASHBITS > STM32_MSI_FLASHBITS) {
FLASH->ACR = (FLASH->ACR & ~FLASH_ACR_LATENCY_Msk) | STM32_FLASHBITS;
+ while ((FLASH->ACR & FLASH_ACR_LATENCY_Msk) !=
+ (STM32_FLASHBITS & FLASH_ACR_LATENCY_Msk)) {
+ }
+ }
/* Switching to the configured SYSCLK source if it is different from MSI.*/
#if (STM32_SW != STM32_SW_MSI)
@@ -345,8 +349,12 @@ void stm32_clock_init(void) { #endif
/* Reduce the flash WS's for SYSCLK source if they are less than MSI WSs */
- if (STM32_FLASHBITS < STM32_MSI_FLASHBITS)
+ if (STM32_FLASHBITS < STM32_MSI_FLASHBITS) {
FLASH->ACR = (FLASH->ACR & ~FLASH_ACR_LATENCY_Msk) | STM32_FLASHBITS;
+ while ((FLASH->ACR & FLASH_ACR_LATENCY_Msk) !=
+ (STM32_FLASHBITS & FLASH_ACR_LATENCY_Msk)) {
+ }
+ }
#endif /* STM32_NO_INIT */
|