aboutsummaryrefslogtreecommitdiffstats
path: root/os/hal/ports/STM32/STM32F4xx/hal_lld.c
diff options
context:
space:
mode:
authorGiovanni Di Sirio <gdisirio@gmail.com>2019-06-30 07:16:02 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2019-06-30 07:16:02 +0000
commita9b5eab94a4e3b2e2bb9215111954e2845500d7a (patch)
tree5062e78305bc54ab4b98ab12f08d2bebd5040703 /os/hal/ports/STM32/STM32F4xx/hal_lld.c
parente8fb1f777f38f1dc5368c03ff2990bd3404cfc18 (diff)
downloadChibiOS-a9b5eab94a4e3b2e2bb9215111954e2845500d7a.tar.gz
ChibiOS-a9b5eab94a4e3b2e2bb9215111954e2845500d7a.tar.bz2
ChibiOS-a9b5eab94a4e3b2e2bb9215111954e2845500d7a.zip
Fixed bug #1035.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/stable_19.1.x@12854 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
Diffstat (limited to 'os/hal/ports/STM32/STM32F4xx/hal_lld.c')
-rw-r--r--os/hal/ports/STM32/STM32F4xx/hal_lld.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/os/hal/ports/STM32/STM32F4xx/hal_lld.c b/os/hal/ports/STM32/STM32F4xx/hal_lld.c
index 8f3aba7db..96e8056c5 100644
--- a/os/hal/ports/STM32/STM32F4xx/hal_lld.c
+++ b/os/hal/ports/STM32/STM32F4xx/hal_lld.c
@@ -184,7 +184,7 @@ void stm32_clock_init(void) {
/* Registers finally cleared to reset values.*/
RCC->CR &= RCC_CR_HSITRIM | RCC_CR_HSION; /* CR Reset value. */
RCC->CFGR = 0; /* CFGR reset value. */
-
+
#if STM32_HSE_ENABLED
/* HSE activation.*/
#if defined(STM32_HSE_BYPASS)
@@ -314,6 +314,9 @@ void stm32_clock_init(void) {
FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN |
FLASH_ACR_DCEN | STM32_FLASHBITS;
#endif
+ while ((FLASH->ACR & FLASH_ACR_LATENCY_Msk) !=
+ (STM32_FLASHBITS & FLASH_ACR_LATENCY_Msk)) {
+ }
/* Switching to the configured clock source if it is different from HSI.*/
#if (STM32_SW != STM32_SW_HSI)