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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-11-29 09:47:15 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-11-29 09:47:15 +0000 |
| commit | ef027ec84e88621d228475ec1daa47647514ef50 (patch) | |
| tree | 0140759fae8fc9f37bec4570f418396dd45ba59e /os/hal/ports/STM32/STM32F0xx/hal_lld.c | |
| parent | e08cf5d36fcb4ce82cacfd5ea1c52d89a5ed534b (diff) | |
| download | ChibiOS-ef027ec84e88621d228475ec1daa47647514ef50.tar.gz ChibiOS-ef027ec84e88621d228475ec1daa47647514ef50.tar.bz2 ChibiOS-ef027ec84e88621d228475ec1daa47647514ef50.zip | |
Fixed bug #550.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7548 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/STM32F0xx/hal_lld.c')
| -rw-r--r-- | os/hal/ports/STM32/STM32F0xx/hal_lld.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/os/hal/ports/STM32/STM32F0xx/hal_lld.c b/os/hal/ports/STM32/STM32F0xx/hal_lld.c index d61f9a02d..7cc925c70 100644 --- a/os/hal/ports/STM32/STM32F0xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32F0xx/hal_lld.c @@ -134,10 +134,18 @@ void stm32_clock_init(void) { RCC->CR |= RCC_CR_HSION; /* Make sure HSI is ON. */
while (!(RCC->CR & RCC_CR_HSIRDY))
; /* Wait until HSI is stable. */
+
+ /* HSI is selected as new source without touching the other fields in
+ CFGR. Clearing the register has to be postponed after HSI is the
+ new source.*/
+ RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW */
+ RCC->CFGR |= RCC_CFGR_SWS_HSI; /* Select HSI as internal*/
+ while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
+ ; /* Wait until HSI is selected. */
+
+ /* Registers finally cleared to reset values.*/
RCC->CR &= RCC_CR_HSITRIM | RCC_CR_HSION; /* CR Reset value. */
RCC->CFGR = 0; /* CFGR reset value. */
- while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
- ; /* Waits until HSI is selected. */
#if STM32_HSE_ENABLED
/* HSE activation.*/
|