diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-12-11 10:27:10 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-12-11 10:27:10 +0000 |
| commit | 456ddf784d7bc6fe7c88446faa8bac759078d019 (patch) | |
| tree | 6aec83a3f121bc25cf14c3b7794941048aad00ac /os/hal/platforms | |
| parent | beb5f4e03ebaaa196009c41fbb4d9e2c7bc3a14d (diff) | |
| download | ChibiOS-456ddf784d7bc6fe7c88446faa8bac759078d019.tar.gz ChibiOS-456ddf784d7bc6fe7c88446faa8bac759078d019.tar.bz2 ChibiOS-456ddf784d7bc6fe7c88446faa8bac759078d019.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4900 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms')
18 files changed, 585 insertions, 126 deletions
diff --git a/os/hal/platforms/SPC560BCxx/hal_lld.h b/os/hal/platforms/SPC560BCxx/hal_lld.h index 27103dfef..6cc920c6e 100644 --- a/os/hal/platforms/SPC560BCxx/hal_lld.h +++ b/os/hal/platforms/SPC560BCxx/hal_lld.h @@ -593,6 +593,13 @@ /* Derived constants and error checks. */
/*===========================================================================*/
+/*
+ * Configuration-related checks.
+ */
+#if !defined(SPC560BCxx_MCUCONF)
+#error "Using a wrong mcuconf.h file, SPC560BCxx_MCUCONF not defined"
+#endif
+
/* Check on the XOSC frequency.*/
#if (SPC5_XOSC_CLK < SPC5_XOSC_CLK_MIN) || \
(SPC5_XOSC_CLK > SPC5_XOSC_CLK_MAX)
diff --git a/os/hal/platforms/SPC560Pxx/hal_lld.h b/os/hal/platforms/SPC560Pxx/hal_lld.h index 97baf86d4..e015d5d09 100644 --- a/os/hal/platforms/SPC560Pxx/hal_lld.h +++ b/os/hal/platforms/SPC560Pxx/hal_lld.h @@ -588,6 +588,13 @@ /* Derived constants and error checks. */
/*===========================================================================*/
+/*
+ * Configuration-related checks.
+ */
+#if !defined(SPC560Pxx_MCUCONF)
+#error "Using a wrong mcuconf.h file, SPC560Pxx_MCUCONF not defined"
+#endif
+
/* Check on the XOSC frequency.*/
#if (SPC5_XOSC_CLK < SPC5_XOSC_CLK_MIN) || \
(SPC5_XOSC_CLK > SPC5_XOSC_CLK_MAX)
diff --git a/os/hal/platforms/SPC56x/hal_lld.c b/os/hal/platforms/SPC563Mxx/hal_lld.c index f5dec4516..89a5d9e45 100644 --- a/os/hal/platforms/SPC56x/hal_lld.c +++ b/os/hal/platforms/SPC563Mxx/hal_lld.c @@ -1,26 +1,20 @@ /*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
+ * Licensed under ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
/**
- * @file SPC56x/hal_lld.c
- * @brief SPC563 HAL subsystem low level driver source.
+ * @file SPC563Mxx/hal_lld.c
+ * @brief SPC563Mxx HAL subsystem low level driver source.
*
* @addtogroup HAL
* @{
@@ -64,7 +58,7 @@ void hal_lld_init(void) { "mtspr 1013, %%r3": : : "r3");
/* FLASH wait states and prefetching setup.*/
- CFLASH0.BIUCR.R = SPC563_FLASH_BIUCR | SPC563_FLASH_WS;
+ CFLASH0.BIUCR.R = SPC_FLASH_BIUCR | SPC_FLASH_WS;
CFLASH0.BIUCR2.R = 0;
CFLASH0.PFCR3.R = 0;
@@ -87,7 +81,7 @@ void hal_lld_init(void) { /* Downcounter timer initialized for system tick use, TB enabled for debug
and measurements.*/
- n = SPC563_SYSCLK / CH_FREQUENCY;
+ n = SPC_SYSCLK / CH_FREQUENCY;
asm volatile ("li %%r3, 0 \t\n"
"mtspr 284, %%r3 \t\n" /* Clear TBL register. */
"mtspr 285, %%r3 \t\n" /* Clear TBU register. */
@@ -114,18 +108,20 @@ void hal_lld_init(void) { *
* @special
*/
-void spc563_clock_init(void) {
+void spc_clock_init(void) {
+#if !SPC_NO_INIT
/* PLL activation.*/
FMPLL.ESYNCR1.B.EMODE = 1;
FMPLL.ESYNCR1.B.CLKCFG &= 1; /* Bypass mode, PLL off.*/
FMPLL.ESYNCR1.B.CLKCFG |= 2; /* PLL on. */
- FMPLL.ESYNCR1.B.EPREDIV = SPC563_CLK_PREDIV;
- FMPLL.ESYNCR1.B.EMFD = SPC563_CLK_MFD;
- FMPLL.ESYNCR2.B.ERFD = SPC563_CLK_RFD;
+ FMPLL.ESYNCR1.B.EPREDIV = SPC_CLK_PREDIV;
+ FMPLL.ESYNCR1.B.EMFD = SPC_CLK_MFD;
+ FMPLL.ESYNCR2.B.ERFD = SPC_CLK_RFD;
while (!FMPLL.SYNSR.B.LOCK)
;
FMPLL.ESYNCR1.B.CLKCFG |= 4; /* Clock from the PLL. */
+#endif /* !SPC_NO_INIT */
}
/** @} */
diff --git a/os/hal/platforms/SPC56x/hal_lld.h b/os/hal/platforms/SPC563Mxx/hal_lld.h index 8a30113ba..afb4a459f 100644 --- a/os/hal/platforms/SPC56x/hal_lld.h +++ b/os/hal/platforms/SPC563Mxx/hal_lld.h @@ -1,26 +1,20 @@ /*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
+ * Licensed under ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
/**
- * @file SPC56x/hal_lld.h
- * @brief SPC563 HAL subsystem low level driver header.
+ * @file SPC563Mxx/hal_lld.h
+ * @brief SPC563Mxx HAL subsystem low level driver header.
*
* @addtogroup HAL
* @{
@@ -50,8 +44,10 @@ #define RFD_DIV8 2 /**< Divide VCO frequency by 8. */
#define RFD_DIV16 3 /**< Divide VCO frequency by 16.*/
-/* The following settings are related to the FLASH controller, performance
- and stability depends on them, be careful.*/
+/**
+ * @name BIUCR register definitions
+ * @{
+ */
#define BIUCR_BANK1_TOO 0x01000000 /**< Use settings for bank1 too.*/
#define BIUCR_MASTER7_PREFETCH 0x00800000 /**< Enable master 7 prefetch. */
#define BIUCR_MASTER6_PREFETCH 0x00400000 /**< Enable master 6 prefetch. */
@@ -90,26 +86,34 @@ #define BIUCR_PFLIM_ON_MISS (1 << 1) /**< Prefetch on miss. */
#define BIUCR_PFLIM_ON_HITMISS (2 << 1) /**< Prefetch on hit and miss. */
#define BIUCR_BFEN 0x00000001 /**< Flash buffering enable. */
+/** @} */
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
+ * @brief Disables the clocks initialization in the HAL.
+ */
+#if !defined(SPC5_NO_INIT) || defined(__DOXYGEN__)
+#define SPC_NO_INIT FALSE
+#endif
+
+/**
* @brief Clock bypass.
* @note If set to @p TRUE then the PLL is not started and initialized, the
* external clock is used as-is and the other clock-related settings
* are ignored.
*/
-#if !defined(SPC563_CLK_BYPASS) || defined(__DOXYGEN__)
-#define SPC563_CLK_BYPASS FALSE
+#if !defined(SPC_CLK_BYPASS) || defined(__DOXYGEN__)
+#define SPC_CLK_BYPASS FALSE
#endif
/**
* @brief Disables the overclock checks.
*/
-#if !defined(SPC563_ALLOW_OVERCLOCK) || defined(__DOXYGEN__)
-#define SPC563_ALLOW_OVERCLOCK FALSE
+#if !defined(SPC_ALLOW_OVERCLOCK) || defined(__DOXYGEN__)
+#define SPC_ALLOW_OVERCLOCK FALSE
#endif
/**
@@ -117,23 +121,23 @@ * @note Must be in range 0...14.
* @note The effective divider factor is this value plus one.
*/
-#if !defined(SPC563_CLK_PREDIV) || defined(__DOXYGEN__)
-#define SPC563_CLK_PREDIV 1
+#if !defined(SPC_CLK_PREDIV) || defined(__DOXYGEN__)
+#define SPC_CLK_PREDIV 1
#endif
/**
* @brief Multiplication factor divider.
* @note Must be in range 32...96.
*/
-#if !defined(SPC563_CLK_MFD) || defined(__DOXYGEN__)
-#define SPC563_CLK_MFD 80
+#if !defined(SPC_CLK_MFD) || defined(__DOXYGEN__)
+#define SPC_CLK_MFD 80
#endif
/**
* @brief Reduced frequency divider.
*/
-#if !defined(SPC563_CLK_RFD) || defined(__DOXYGEN__)
-#define SPC563_CLK_RFD RFD_DIV4
+#if !defined(SPC_CLK_RFD) || defined(__DOXYGEN__)
+#define SPC_CLK_RFD RFD_DIV4
#endif
/**
@@ -144,64 +148,71 @@ * those are calculated from the system clock and ORed with this
* value.
*/
-#if !defined(SPC563_FLASH_BIUCR) || defined(__DOXYGEN__)
-#define SPC563_FLASH_BIUCR (BIUCR_BANK1_TOO | \
- BIUCR_MASTER4_PREFETCH | \
- BIUCR_MASTER0_PREFETCH | \
- BIUCR_DPFEN | \
- BIUCR_IPFEN | \
- BIUCR_PFLIM_ON_MISS | \
- BIUCR_BFEN)
+#if !defined(SPC_FLASH_BIUCR) || defined(__DOXYGEN__)
+#define SPC_FLASH_BIUCR (BIUCR_BANK1_TOO | \
+ BIUCR_MASTER4_PREFETCH | \
+ BIUCR_MASTER0_PREFETCH | \
+ BIUCR_DPFEN | \
+ BIUCR_IPFEN | \
+ BIUCR_PFLIM_ON_MISS | \
+ BIUCR_BFEN)
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
-#if (SPC563_CLK_PREDIV < 0) || (SPC563_CLK_PREDIV > 14)
-#error "invalid SPC563_CLK_PREDIV value specified"
+/*
+ * Configuration-related checks.
+ */
+#if !defined(SPC563Mxx_MCUCONF)
+#error "Using a wrong mcuconf.h file, SPC563Mxx_MCUCONF not defined"
+#endif
+
+#if (SPC_CLK_PREDIV < 0) || (SPC_CLK_PREDIV > 14)
+#error "invalid SPC_CLK_PREDIV value specified"
#endif
-#if (SPC563_CLK_MFD < 32) || (SPC563_CLK_MFD > 96)
-#error "invalid SPC563_CLK_MFD value specified"
+#if (SPC_CLK_MFD < 32) || (SPC_CLK_MFD > 96)
+#error "invalid SPC_CLK_MFD value specified"
#endif
-#if (SPC563_CLK_RFD != RFD_DIV2) && (SPC563_CLK_RFD != RFD_DIV4) && \
- (SPC563_CLK_RFD != RFD_DIV8) && (SPC563_CLK_RFD != RFD_DIV16)
-#error "invalid SPC563_CLK_RFD value specified"
+#if (SPC_CLK_RFD != RFD_DIV2) && (SPC_CLK_RFD != RFD_DIV4) && \
+ (SPC_CLK_RFD != RFD_DIV8) && (SPC_CLK_RFD != RFD_DIV16)
+#error "invalid SPC_CLK_RFD value specified"
#endif
/**
* @brief PLL output clock.
*/
-#define SPC563_PLLCLK ((EXTCLK / (SPC563_CLK_PREDIV + 1)) * SPC563_CLK_MFD)
+#define SPC_PLLCLK ((EXTCLK / (SPC_CLK_PREDIV + 1)) * SPC_CLK_MFD)
-#if (SPC563_PLLCLK < 256000000) || (SPC563_PLLCLK > 512000000)
+#if (SPC_PLLCLK < 256000000) || (SPC_PLLCLK > 512000000)
#error "VCO frequency out of the acceptable range (256...512)"
#endif
/**
* @brief PLL output clock.
*/
-#if !SPC563_CLK_BYPASS || defined(__DOXYGEN__)
-#define SPC563_SYSCLK (SPC563_PLLCLK / (1 << (SPC563_CLK_RFD + 1)))
+#if !SPC_CLK_BYPASS || defined(__DOXYGEN__)
+#define SPC_SYSCLK (SPC_PLLCLK / (1 << (SPC_CLK_RFD + 1)))
#else
-#define SPC563_SYSCLK EXTCLK
+#define SPC_SYSCLK EXTCLK
#endif
-#if (SPC563_SYSCLK > 80000000) && !SPC563_ALLOW_OVERCLOCK
+#if (SPC_SYSCLK > 80000000) && !SPC_ALLOW_OVERCLOCK
#error "System clock above maximum rated frequency (80MHz)"
#endif
/**
* @brief Flash wait states are a function of the system clock.
*/
-#if (SPC563_SYSCLK <= 30000000) || defined(__DOXYGEN__)
-#define SPC563_FLASH_WS (BIUCR_APC_0 | BIUCR_RWSC_0 | BIUCR_WWSC_1)
-#elif SPC563_SYSCLK <= 60000000
-#define SPC563_FLASH_WS (BIUCR_APC_1 | BIUCR_RWSC_1 | BIUCR_WWSC_1)
+#if (SPC_SYSCLK <= 30000000) || defined(__DOXYGEN__)
+#define SPC_FLASH_WS (BIUCR_APC_0 | BIUCR_RWSC_0 | BIUCR_WWSC_1)
+#elif SPC_SYSCLK <= 60000000
+#define SPC_FLASH_WS (BIUCR_APC_1 | BIUCR_RWSC_1 | BIUCR_WWSC_1)
#else
-#define SPC563_FLASH_WS (BIUCR_APC_2 | BIUCR_RWSC_2 | BIUCR_WWSC_1)
+#define SPC_FLASH_WS (BIUCR_APC_2 | BIUCR_RWSC_2 | BIUCR_WWSC_1)
#endif
/*===========================================================================*/
@@ -220,7 +231,7 @@ extern "C" {
#endif
void hal_lld_init(void);
- void spc563_clock_init(void);
+ void spc_clock_init(void);
#ifdef __cplusplus
}
#endif
diff --git a/os/hal/platforms/SPC56x/mpc563m.h b/os/hal/platforms/SPC563Mxx/mpc563m.h index 8ee2b5787..8ee2b5787 100644 --- a/os/hal/platforms/SPC56x/mpc563m.h +++ b/os/hal/platforms/SPC563Mxx/mpc563m.h diff --git a/os/hal/platforms/SPC56x/platform.dox b/os/hal/platforms/SPC563Mxx/platform.dox index 9b8eec901..9b8eec901 100644 --- a/os/hal/platforms/SPC56x/platform.dox +++ b/os/hal/platforms/SPC563Mxx/platform.dox diff --git a/os/hal/platforms/SPC563Mxx/platform.mk b/os/hal/platforms/SPC563Mxx/platform.mk new file mode 100644 index 000000000..e9a508857 --- /dev/null +++ b/os/hal/platforms/SPC563Mxx/platform.mk @@ -0,0 +1,6 @@ +# List of all the SPC56x platform files.
+PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/SPC563Mxx/hal_lld.c \
+ ${CHIBIOS}/os/hal/platforms/SPC5xx/ESCIv1/serial_lld.c
+
+# Required include directories
+PLATFORMINC = ${CHIBIOS}/os/hal/platforms/SPC563Mxx
diff --git a/os/hal/platforms/SPC56x/serial_lld.c b/os/hal/platforms/SPC563Mxx/serial_lld.c index e562b6c2d..e562b6c2d 100644 --- a/os/hal/platforms/SPC56x/serial_lld.c +++ b/os/hal/platforms/SPC563Mxx/serial_lld.c diff --git a/os/hal/platforms/SPC56x/serial_lld.h b/os/hal/platforms/SPC563Mxx/serial_lld.h index b02b160b1..b02b160b1 100644 --- a/os/hal/platforms/SPC56x/serial_lld.h +++ b/os/hal/platforms/SPC563Mxx/serial_lld.h diff --git a/os/hal/platforms/SPC563Mxx/typedefs.h b/os/hal/platforms/SPC563Mxx/typedefs.h new file mode 100644 index 000000000..2214513eb --- /dev/null +++ b/os/hal/platforms/SPC563Mxx/typedefs.h @@ -0,0 +1,25 @@ +/*
+ * Licensed under ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file SPC56x/typedefs.h
+ * @brief Dummy typedefs file.
+ */
+
+#ifndef _TYPEDEFS_H_
+#define _TYPEDEFS_H_
+
+#include "chtypes.h"
+
+#endif /* _TYPEDEFS_H_ */
diff --git a/os/hal/platforms/SPC56x/platform.mk b/os/hal/platforms/SPC56x/platform.mk deleted file mode 100644 index 6069e7dc6..000000000 --- a/os/hal/platforms/SPC56x/platform.mk +++ /dev/null @@ -1,6 +0,0 @@ -# List of all the SPC56x platform files.
-PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/SPC56x/hal_lld.c \
- ${CHIBIOS}/os/hal/platforms/SPC56x/serial_lld.c
-
-# Required include directories
-PLATFORMINC = ${CHIBIOS}/os/hal/platforms/SPC56x
diff --git a/os/hal/platforms/SPC56x/typedefs.h b/os/hal/platforms/SPC56x/typedefs.h deleted file mode 100644 index 5947e0f37..000000000 --- a/os/hal/platforms/SPC56x/typedefs.h +++ /dev/null @@ -1,31 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC56x/typedefs.h
- * @brief Dummy typedefs file.
- */
-
-#ifndef _TYPEDEFS_H_
-#define _TYPEDEFS_H_
-
-#include "chtypes.h"
-
-#endif /* _TYPEDEFS_H_ */
diff --git a/os/hal/platforms/SPC5xx/ESCI_v1/serial_lld.c b/os/hal/platforms/SPC5xx/ESCI_v1/serial_lld.c new file mode 100644 index 000000000..ca90d0d56 --- /dev/null +++ b/os/hal/platforms/SPC5xx/ESCI_v1/serial_lld.c @@ -0,0 +1,288 @@ +/*
+ * Licensed under ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file SPC5xx/ESCI_v1/serial_lld.c
+ * @brief SPC5xx low level serial driver code.
+ *
+ * @addtogroup SERIAL
+ * @{
+ */
+
+#include "ch.h"
+#include "hal.h"
+
+#if HAL_USE_SERIAL || defined(__DOXYGEN__)
+
+/*===========================================================================*/
+/* Driver exported variables. */
+/*===========================================================================*/
+
+/**
+ * @brief eSCI-A serial driver identifier.
+ */
+#if SPC_USE_ESCIA || defined(__DOXYGEN__)
+SerialDriver SD1;
+#endif
+
+/**
+ * @brief eSCI-B serial driver identifier.
+ */
+#if SPC_USE_ESCIB || defined(__DOXYGEN__)
+SerialDriver SD2;
+#endif
+
+/*===========================================================================*/
+/* Driver local variables. */
+/*===========================================================================*/
+
+/**
+ * @brief Driver default configuration.
+ */
+static const SerialConfig default_config = {
+ SERIAL_DEFAULT_BITRATE,
+ SD_MODE_NORMAL | SD_MODE_PARITY_NONE
+};
+
+/*===========================================================================*/
+/* Driver local functions. */
+/*===========================================================================*/
+
+/**
+ * @brief eSCI initialization.
+ * @details This function must be invoked with interrupts disabled.
+ *
+ * @param[in] sdp pointer to a @p SerialDriver object
+ * @param[in] config the architecture-dependent serial driver configuration
+ */
+static void esci_init(SerialDriver *sdp, const SerialConfig *config) {
+ volatile struct ESCI_tag *escip = sdp->escip;
+ uint8_t mode = config->sc_mode;
+
+ escip->CR2.R = 0; /* MDIS off. */
+ escip->CR1.R = 0;
+ escip->LCR.R = 0;
+ escip->CR1.B.SBR = SPC_SYSCLK / (16 * config->sc_speed);
+ if (mode & SD_MODE_LOOPBACK)
+ escip->CR1.B.LOOPS = 1;
+ switch (mode & SD_MODE_PARITY) {
+ case SD_MODE_PARITY_ODD:
+ escip->CR1.B.PT = 1;
+ case SD_MODE_PARITY_EVEN:
+ escip->CR1.B.PE = 1;
+ escip->CR1.B.M = 1; /* Makes it 8 bits data + 1 bit parity. */
+ default:
+ ;
+ }
+ escip->LPR.R = 0;
+ escip->CR1.R |= 0x0000002C; /* RIE, TE, RE to 1. */
+ escip->CR2.R |= 0x000F; /* ORIE, NFIE, FEIE, PFIE to 1. */
+}
+
+/**
+ * @brief eSCI de-initialization.
+ * @details This function must be invoked with interrupts disabled.
+ *
+ * @param[in] escip pointer to an eSCI I/O block
+ */
+static void esci_deinit(volatile struct ESCI_tag *escip) {
+
+ escip->LPR.R = 0;
+ escip->SR.R = 0xFFFFFFFF;
+ escip->CR1.R = 0;
+ escip->CR2.R = 0x8000; /* MDIS on. */
+}
+
+/**
+ * @brief Error handling routine.
+ *
+ * @param[in] sdp pointer to a @p SerialDriver object
+ * @param[in] sr eSCI SR register value
+ */
+static void set_error(SerialDriver *sdp, uint32_t sr) {
+ flagsmask_t sts = 0;
+
+ if (sr & 0x08000000)
+ sts |= SD_OVERRUN_ERROR;
+ if (sr & 0x04000000)
+ sts |= SD_NOISE_ERROR;
+ if (sr & 0x02000000)
+ sts |= SD_FRAMING_ERROR;
+ if (sr & 0x01000000)
+ sts |= SD_PARITY_ERROR;
+/* if (sr & 0x00000000)
+ sts |= SD_BREAK_DETECTED;*/
+ chSysLockFromIsr();
+ chnAddFlagsI(sdp, sts);
+ chSysUnlockFromIsr();
+}
+
+/**
+ * @brief Common IRQ handler.
+ *
+ * @param[in] sdp pointer to a @p SerialDriver object
+ */
+static void serve_interrupt(SerialDriver *sdp) {
+ volatile struct ESCI_tag *escip = sdp->escip;
+
+ uint32_t sr = escip->SR.R;
+ escip->SR.R = 0x3FFFFFFF; /* Does not clear TDRE | TC.*/
+ if (sr & 0x0F000000) /* OR | NF | FE | PF. */
+ set_error(sdp, sr);
+ if (sr & 0x20000000) { /* RDRF. */
+ chSysLockFromIsr();
+ sdIncomingDataI(sdp, escip->DR.B.D);
+ chSysUnlockFromIsr();
+ }
+ if (escip->CR1.B.TIE && (sr & 0x80000000)) { /* TDRE. */
+ msg_t b;
+ chSysLockFromIsr();
+ b = chOQGetI(&sdp->oqueue);
+ if (b < Q_OK) {
+ chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
+ escip->CR1.B.TIE = 0;
+ }
+ else {
+ ESCI_A.SR.B.TDRE = 1;
+ escip->DR.R = (uint16_t)b;
+ }
+ chSysUnlockFromIsr();
+ }
+}
+
+#if SPC_USE_ESCIA || defined(__DOXYGEN__)
+static void notify1(GenericQueue *qp) {
+
+ (void)qp;
+ if (ESCI_A.SR.B.TDRE) {
+ msg_t b = sdRequestDataI(&SD1);
+ if (b != Q_EMPTY) {
+ ESCI_A.SR.B.TDRE = 1;
+ ESCI_A.CR1.B.TIE = 1;
+ ESCI_A.DR.R = (uint16_t)b;
+ }
+ }
+}
+#endif
+
+#if SPC_USE_ESCIB || defined(__DOXYGEN__)
+static void notify2(GenericQueue *qp) {
+
+ (void)qp;
+ if (ESCI_B.SR.B.TDRE) {
+ msg_t b = sdRequestDataI(&SD2);
+ if (b != Q_EMPTY) {
+ ESCI_B.SR.B.TDRE = 1;
+ ESCI_B.CR1.B.TIE = 1;
+ ESCI_B.DR.R = (uint16_t)b;
+ }
+ }
+}
+#endif
+
+/*===========================================================================*/
+/* Driver interrupt handlers. */
+/*===========================================================================*/
+
+#if SPC_USE_ESCIA || defined(__DOXYGEN__)
+/**
+ * @brief eSCI-A interrupt handler.
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(vector146) {
+
+ CH_IRQ_PROLOGUE();
+
+ serve_interrupt(&SD1);
+
+ CH_IRQ_EPILOGUE();
+}
+#endif
+
+#if SPC_USE_ESCIB || defined(__DOXYGEN__)
+/**
+ * @brief eSCI-B interrupt handler.
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(vector149) {
+
+ CH_IRQ_PROLOGUE();
+
+ serve_interrupt(&SD2);
+
+ CH_IRQ_EPILOGUE();
+}
+#endif
+
+/*===========================================================================*/
+/* Driver exported functions. */
+/*===========================================================================*/
+
+/**
+ * @brief Low level serial driver initialization.
+ *
+ * @notapi
+ */
+void sd_lld_init(void) {
+
+#if SPC_USE_ESCIA
+ sdObjectInit(&SD1, NULL, notify1);
+ SD1.escip = &ESCI_A;
+ ESCI_A.CR2.R = 0x8000; /* MDIS ON. */
+ INTC.PSR[146].R = SPC_ESCIA_PRIORITY;
+#endif
+
+#if SPC_USE_ESCIB
+ sdObjectInit(&SD2, NULL, notify2);
+ SD2.escip = &ESCI_B;
+ ESCI_B.CR2.R = 0x8000; /* MDIS ON. */
+ INTC.PSR[149].R = SPC_ESCIB_PRIORITY;
+#endif
+}
+
+/**
+ * @brief Low level serial driver configuration and (re)start.
+ *
+ * @param[in] sdp pointer to a @p SerialDriver object
+ * @param[in] config the architecture-dependent serial driver configuration.
+ * If this parameter is set to @p NULL then a default
+ * configuration is used.
+ *
+ * @notapi
+ */
+void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
+
+ if (config == NULL)
+ config = &default_config;
+ esci_init(sdp, config);
+}
+
+/**
+ * @brief Low level serial driver stop.
+ *
+ * @param[in] sdp pointer to a @p SerialDriver object
+ *
+ * @notapi
+ */
+void sd_lld_stop(SerialDriver *sdp) {
+
+ if (sdp->state == SD_READY)
+ esci_deinit(sdp->escip);
+}
+
+#endif /* HAL_USE_SERIAL */
+
+/** @} */
diff --git a/os/hal/platforms/SPC5xx/ESCI_v1/serial_lld.h b/os/hal/platforms/SPC5xx/ESCI_v1/serial_lld.h new file mode 100644 index 000000000..606344d9f --- /dev/null +++ b/os/hal/platforms/SPC5xx/ESCI_v1/serial_lld.h @@ -0,0 +1,156 @@ +/*
+ * Licensed under ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file SPC5xx/ESCI_v1/serial_lld.c
+ * @brief SPC5xx low level serial driver code.
+ *
+ * @addtogroup SERIAL
+ * @{
+ */
+
+#ifndef _SERIAL_LLD_H_
+#define _SERIAL_LLD_H_
+
+#if HAL_USE_SERIAL || defined(__DOXYGEN__)
+
+/*===========================================================================*/
+/* Driver constants. */
+/*===========================================================================*/
+
+/**
+ * @name Serial port modes
+ * @{
+ */
+#define SD_MODE_PARITY_MASK 0x03 /**< @brief Parity field mask. */
+#define SD_MODE_PARITY_NONE 0x00 /**< @brief No parity. */
+#define SD_MODE_PARITY_EVEN 0x01 /**< @brief Even parity. */
+#define SD_MODE_PARITY_ODD 0x02 /**< @brief Odd parity. */
+
+#define SD_MODE_NORMAL 0x00 /**< @brief Normal operations. */
+#define SD_MODE_LOOPBACK 0x80 /**< @brief Internal loopback. */
+/** @} */
+
+/*===========================================================================*/
+/* Driver pre-compile time settings. */
+/*===========================================================================*/
+
+/**
+ * @brief eSCI-A driver enable switch.
+ * @details If set to @p TRUE the support for eSCI-A is included.
+ * @note The default is @p TRUE.
+ */
+#if !defined(SPC_USE_ESCIA) || defined(__DOXYGEN__)
+#define SPC_USE_ESCIA TRUE
+#endif
+
+/**
+ * @brief eSCI-B driver enable switch.
+ * @details If set to @p TRUE the support for eSCI-B is included.
+ * @note The default is @p TRUE.
+ */
+#if !defined(SPC_USE_ESCIB) || defined(__DOXYGEN__)
+#define SPC_USE_ESCIB TRUE
+#endif
+
+/**
+ * @brief eSCI-A interrupt priority level setting.
+ */
+#if !defined(SPC_ESCIA_PRIORITY) || defined(__DOXYGEN__)
+#define SPC_ESCIA_PRIORITY 8
+#endif
+
+/**
+ * @brief eSCI-B interrupt priority level setting.
+ */
+#if !defined(SPC_ESCIB_PRIORITY) || defined(__DOXYGEN__)
+#define SPC_ESCIB_PRIORITY 8
+#endif
+
+/*===========================================================================*/
+/* Derived constants and error checks. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver data structures and types. */
+/*===========================================================================*/
+
+/**
+ * @brief Generic Serial Driver configuration structure.
+ * @details An instance of this structure must be passed to @p sdStart()
+ * in order to configure and start a serial driver operations.
+ * @note This structure content is architecture dependent, each driver
+ * implementation defines its own version and the custom static
+ * initializers.
+ */
+typedef struct {
+ /**
+ * @brief Bit rate.
+ */
+ uint32_t sc_speed;
+ /**
+ * @brief Mode flags.
+ */
+ uint8_t sc_mode;
+} SerialConfig;
+
+/**
+ * @brief @p SerialDriver specific data.
+ */
+#define _serial_driver_data \
+ _base_asynchronous_channel_data \
+ /* Driver state.*/ \
+ sdstate_t state; \
+ /* Input queue.*/ \
+ InputQueue iqueue; \
+ /* Output queue.*/ \
+ OutputQueue oqueue; \
+ /* Input circular buffer.*/ \
+ uint8_t ib[SERIAL_BUFFERS_SIZE]; \
+ /* Output circular buffer.*/ \
+ uint8_t ob[SERIAL_BUFFERS_SIZE]; \
+ /* End of the mandatory fields.*/ \
+ /* Pointer to the volatile eSCI registers block.*/ \
+ volatile struct ESCI_tag *escip;
+
+/*===========================================================================*/
+/* Driver macros. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* External declarations. */
+/*===========================================================================*/
+
+#if SPC_USE_ESCIA && !defined(__DOXYGEN__)
+extern SerialDriver SD1;
+#endif
+#if SPC_USE_ESCIB && !defined(__DOXYGEN__)
+extern SerialDriver SD2;
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void sd_lld_init(void);
+ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config);
+ void sd_lld_stop(SerialDriver *sdp);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* HAL_USE_SERIAL */
+
+#endif /* _SERIAL_LLD_H_ */
+
+/** @} */
diff --git a/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.c b/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.c index 4334c03d4..b666a65ae 100644 --- a/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.c +++ b/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.c @@ -13,7 +13,7 @@ */
/**
- * @file SPC5xx/serial_lld.c
+ * @file SPC5xx/LINFlex_v1/serial_lld.c
* @brief SPC5xx low level serial driver code.
*
* @addtogroup SERIAL
diff --git a/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.h b/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.h index 85dc1345b..0b1873f30 100644 --- a/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.h +++ b/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.h @@ -13,7 +13,7 @@ */
/**
- * @file SPC5xx/serial_lld.h
+ * @file SPC5xx/LINFlex_v1/serial_lld.h
* @brief SPC5xx low level serial driver header.
*
* @addtogroup SERIAL
diff --git a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.c b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.c index a0aee25f5..8cd8b2bd3 100644 --- a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.c +++ b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.c @@ -13,7 +13,7 @@ */
/**
- * @file SPC5xx/SIU_v1/pal_lld.c
+ * @file SPC5xx/SIUL_v1/pal_lld.c
* @brief SPC5xx SIU/SIUL low level driver code.
*
* @addtogroup PAL
diff --git a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h index e15bdf441..32b54d260 100644 --- a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h +++ b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h @@ -13,7 +13,7 @@ */
/**
- * @file SPC5xx/SIU_v1//pal_lld.h
+ * @file SPC5xx/SIUL_v1/pal_lld.h
* @brief SPC5xx SIU/SIUL low level driver header.
*
* @addtogroup PAL
|