RTCv1. Fixed unneded RTC initialization when HAL_USE_RTC disabled (bug 3594620).

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4899 35acf78f-673a-0410-8e92-d51de3d6d3f4

1 files changed, 3 insertions, 3 deletions

diff --git a/os/hal/platforms/STM32F1xx/hal_lld.c b/os/hal/platforms/STM32F1xx/hal_lld.c
index 3d3c6caaa..f1e343e2a 100644
--- a/os/hal/platforms/STM32F1xx/hal_lld.c
+++ b/os/hal/platforms/STM32F1xx/hal_lld.c
@@ -51,6 +51,7 @@ static void hal_lld_backup_domain_init(void) {
   /* Backup domain access enabled and left open.*/

   PWR->CR |= PWR_CR_DBP;

 

+#if HAL_USE_RTC

   /* Reset BKP domain if different clock source selected.*/

   if ((RCC->BDCR & STM32_RTCSEL_MASK) != STM32_RTCSEL){

     /* Backup domain reset.*/

@@ -63,7 +64,7 @@ static void hal_lld_backup_domain_init(void) {
   RCC->BDCR |= RCC_BDCR_LSEON;

   while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)

     ;                                     /* Waits until LSE is stable.   */

-#endif

+#endif /* STM32_LSE_ENABLED */

 

 #if STM32_RTCSEL != STM32_RTCSEL_NOCLOCK

   /* If the backup domain hasn't been initialized yet then proceed with

@@ -76,11 +77,10 @@ static void hal_lld_backup_domain_init(void) {
     RCC->BDCR |= RCC_BDCR_RTCEN;

 

     /* Prescaler value loaded in registers.*/

-#if HAL_USE_RTC

     rtc_lld_set_prescaler();

-#endif /* HAL_USE_RTC */

   }

 #endif /* STM32_RTCSEL != STM32_RTCSEL_NOCLOCK */

+#endif /* HAL_USE_RTC */

 }

 

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