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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2019-06-30 07:38:10 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2019-06-30 07:38:10 +0000 |
| commit | 9ad1c43e87dea94438382486e1c6fd8285e12148 (patch) | |
| tree | b70344924d5eab0087d52b451a87d64d39af36da | |
| parent | a9b5eab94a4e3b2e2bb9215111954e2845500d7a (diff) | |
| download | ChibiOS-9ad1c43e87dea94438382486e1c6fd8285e12148.tar.gz ChibiOS-9ad1c43e87dea94438382486e1c6fd8285e12148.tar.bz2 ChibiOS-9ad1c43e87dea94438382486e1c6fd8285e12148.zip | |
Fixed bug #1036.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/stable_19.1.x@12856 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
| -rw-r--r-- | os/hal/ports/STM32/STM32L4xx+/stm32_rcc.h | 23 | ||||
| -rw-r--r-- | os/hal/ports/STM32/STM32L4xx/stm32_rcc.h | 23 | ||||
| -rw-r--r-- | readme.txt | 1 |
3 files changed, 47 insertions, 0 deletions
diff --git a/os/hal/ports/STM32/STM32L4xx+/stm32_rcc.h b/os/hal/ports/STM32/STM32L4xx+/stm32_rcc.h index d88c378f4..cc86599c1 100644 --- a/os/hal/ports/STM32/STM32L4xx+/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32L4xx+/stm32_rcc.h @@ -595,6 +595,29 @@ * @api
*/
#define rccResetI2C3() rccResetAPB1R1(RCC_APB1RSTR1_I2C3RST)
+
+/**
+ * @brief Enables the I2C4 peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableI2C4(lp) rccEnableAPB1R2(RCC_APB1ENR2_I2C4EN, lp)
+
+/**
+ * @brief Disables the I2C4 peripheral clock.
+ *
+ * @api
+ */
+#define rccDisableI2C4() rccDisableAPB1R1(RCC_APB1ENR2_I2C4EN)
+
+/**
+ * @brief Resets the I2C4 peripheral.
+ *
+ * @api
+ */
+#define rccResetI2C4() rccResetAPB1R1(RCC_APB1RSTR2_I2C4RST)
/** @} */
/**
diff --git a/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h b/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h index a48e305f8..48ad74050 100644 --- a/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h @@ -567,6 +567,29 @@ * @api
*/
#define rccResetI2C3() rccResetAPB1R1(RCC_APB1RSTR1_I2C3RST)
+
+/**
+ * @brief Enables the I2C4 peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableI2C4(lp) rccEnableAPB1R2(RCC_APB1ENR2_I2C4EN, lp)
+
+/**
+ * @brief Disables the I2C4 peripheral clock.
+ *
+ * @api
+ */
+#define rccDisableI2C4() rccDisableAPB1R1(RCC_APB1ENR2_I2C4EN)
+
+/**
+ * @brief Resets the I2C4 peripheral.
+ *
+ * @api
+ */
+#define rccResetI2C4() rccResetAPB1R1(RCC_APB1RSTR2_I2C4RST)
/** @} */
/**
diff --git a/readme.txt b/readme.txt index 0067ea02c..4fa618da8 100644 --- a/readme.txt +++ b/readme.txt @@ -78,6 +78,7 @@ generate a library with a pre-configured RT. It also includes
an "header generator" able to generate an unified "ch.h" with
all options resolved.
+- FIX: Fixed missing I2C4 RCC definitions for L4/L4+ (bug #1036).
- FIX: Fixed missing delay after STM32 wait states setup (bug #1035).
- FIX: Fixed reduced time slices in RT (bug #1034).
- FIX: Fixed long intervals fail when interval type is larger than time type
|