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| author | awygle <awygle@gmail.com> | 2016-08-17 00:15:02 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2016-08-17 00:15:02 -0500 |
| commit | 66ee156aa4e7d99db9854cf7fd67515d73b1e3fa (patch) | |
| tree | e01ffb3853c05e75b81be838447c2f5211c53f07 /os/hal/boards | |
| parent | e1601e0a7d9b805422e511ea1c29ef9f5ca6000b (diff) | |
| parent | d9ee72504f248b7f9edae382ff941453301bf5ad (diff) | |
| download | ChibiOS-Contrib-66ee156aa4e7d99db9854cf7fd67515d73b1e3fa.tar.gz ChibiOS-Contrib-66ee156aa4e7d99db9854cf7fd67515d73b1e3fa.tar.bz2 ChibiOS-Contrib-66ee156aa4e7d99db9854cf7fd67515d73b1e3fa.zip | |
Merge pull request #81 from awygle/adc
MSP430X ADC12 Support
Diffstat (limited to 'os/hal/boards')
| -rw-r--r-- | os/hal/boards/EXP430FR5969/board.c | 6 | ||||
| -rw-r--r-- | os/hal/boards/EXP430FR5969/board.h | 6 | ||||
| -rw-r--r-- | os/hal/boards/EXP430FR6989/board.c | 12 | ||||
| -rw-r--r-- | os/hal/boards/EXP430FR6989/board.h | 14 |
4 files changed, 10 insertions, 28 deletions
diff --git a/os/hal/boards/EXP430FR5969/board.c b/os/hal/boards/EXP430FR5969/board.c index ac48ba0..0643cce 100644 --- a/os/hal/boards/EXP430FR5969/board.c +++ b/os/hal/boards/EXP430FR5969/board.c @@ -25,11 +25,11 @@ const PALConfig pal_default_config =
{
{VAL_IOPORT1_OUT, VAL_IOPORT1_DIR, VAL_IOPORT1_REN, VAL_IOPORT1_SEL0,
- VAL_IOPORT1_SEL1, VAL_IOPORT1_IES, VAL_IOPORT1_IE},
+ VAL_IOPORT1_SEL1},
{VAL_IOPORT2_OUT, VAL_IOPORT2_DIR, VAL_IOPORT2_REN, VAL_IOPORT2_SEL0,
- VAL_IOPORT2_SEL1, VAL_IOPORT2_IES, VAL_IOPORT2_IE},
+ VAL_IOPORT2_SEL1},
{VAL_IOPORT0_OUT, VAL_IOPORT0_DIR, VAL_IOPORT0_REN, VAL_IOPORT0_SEL0,
- VAL_IOPORT0_SEL1, VAL_IOPORT0_IES, VAL_IOPORT0_IE}
+ VAL_IOPORT0_SEL1}
}; /* Set UART TX pin correctly */
#endif /* HAL_USE_PAL */
diff --git a/os/hal/boards/EXP430FR5969/board.h b/os/hal/boards/EXP430FR5969/board.h index 97103d3..3abe1cc 100644 --- a/os/hal/boards/EXP430FR5969/board.h +++ b/os/hal/boards/EXP430FR5969/board.h @@ -65,8 +65,6 @@ #define VAL_IOPORT1_REN 0xFCFE
#define VAL_IOPORT1_SEL0 0x0000
#define VAL_IOPORT1_SEL1 0x0300
-#define VAL_IOPORT1_IES 0x0000
-#define VAL_IOPORT1_IE 0x0000
/*
* Port B setup:
@@ -93,8 +91,6 @@ #define VAL_IOPORT2_REN 0xBDFF
#define VAL_IOPORT2_SEL0 0x0000
#define VAL_IOPORT2_SEL1 0x0000
-#define VAL_IOPORT2_IES 0x0000
-#define VAL_IOPORT2_IE 0x0000
/*
* Port J setup:
@@ -113,8 +109,6 @@ #define VAL_IOPORT0_REN 0x00CF
#define VAL_IOPORT0_SEL0 0x0030
#define VAL_IOPORT0_SEL1 0x0000
-#define VAL_IOPORT0_IES 0x0000
-#define VAL_IOPORT0_IE 0x0000
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
diff --git a/os/hal/boards/EXP430FR6989/board.c b/os/hal/boards/EXP430FR6989/board.c index a6836cf..475a2ea 100644 --- a/os/hal/boards/EXP430FR6989/board.c +++ b/os/hal/boards/EXP430FR6989/board.c @@ -25,17 +25,17 @@ const PALConfig pal_default_config =
{
{VAL_IOPORT1_OUT, VAL_IOPORT1_DIR, VAL_IOPORT1_REN, VAL_IOPORT1_SEL0,
- VAL_IOPORT1_SEL1, VAL_IOPORT1_IES, VAL_IOPORT1_IE},
+ VAL_IOPORT1_SEL1},
{VAL_IOPORT2_OUT, VAL_IOPORT2_DIR, VAL_IOPORT2_REN, VAL_IOPORT2_SEL0,
- VAL_IOPORT2_SEL1, VAL_IOPORT2_IES, VAL_IOPORT2_IE},
+ VAL_IOPORT2_SEL1},
{VAL_IOPORT3_OUT, VAL_IOPORT3_DIR, VAL_IOPORT3_REN, VAL_IOPORT3_SEL0,
- VAL_IOPORT3_SEL1, VAL_IOPORT3_IES, VAL_IOPORT3_IE},
+ VAL_IOPORT3_SEL1},
{VAL_IOPORT4_OUT, VAL_IOPORT4_DIR, VAL_IOPORT4_REN, VAL_IOPORT4_SEL0,
- VAL_IOPORT4_SEL1, VAL_IOPORT4_IES, VAL_IOPORT4_IE},
+ VAL_IOPORT4_SEL1},
{VAL_IOPORT5_OUT, VAL_IOPORT5_DIR, VAL_IOPORT5_REN, VAL_IOPORT5_SEL0,
- VAL_IOPORT5_SEL1, VAL_IOPORT5_IES, VAL_IOPORT5_IE},
+ VAL_IOPORT5_SEL1},
{VAL_IOPORT0_OUT, VAL_IOPORT0_DIR, VAL_IOPORT0_REN, VAL_IOPORT0_SEL0,
- VAL_IOPORT0_SEL1, VAL_IOPORT0_IES, VAL_IOPORT0_IE}
+ VAL_IOPORT0_SEL1}
}; /* Set UART TX pin correctly */
#endif /* HAL_USE_PAL */
diff --git a/os/hal/boards/EXP430FR6989/board.h b/os/hal/boards/EXP430FR6989/board.h index 83b8fbb..d5afe29 100644 --- a/os/hal/boards/EXP430FR6989/board.h +++ b/os/hal/boards/EXP430FR6989/board.h @@ -69,8 +69,6 @@ #define VAL_IOPORT1_REN 0xFFFE
#define VAL_IOPORT1_SEL0 0x0000
#define VAL_IOPORT1_SEL1 0x0000
-#define VAL_IOPORT1_IES 0x0006
-#define VAL_IOPORT1_IE 0x0006
/*
* Port B setup:
@@ -97,8 +95,6 @@ #define VAL_IOPORT2_REN 0xFFCF
#define VAL_IOPORT2_SEL0 0x0030
#define VAL_IOPORT2_SEL1 0x0000
-#define VAL_IOPORT2_IES 0x0000
-#define VAL_IOPORT2_IE 0x0000
/*
* Port C setup:
@@ -125,8 +121,6 @@ #define VAL_IOPORT3_REN 0xFFFF
#define VAL_IOPORT3_SEL0 0x0000
#define VAL_IOPORT3_SEL1 0x0000
-#define VAL_IOPORT3_IES 0x0000
-#define VAL_IOPORT3_IE 0x0000
/*
* Port D setup:
@@ -153,11 +147,9 @@ #define VAL_IOPORT4_REN 0xFFFF
#define VAL_IOPORT4_SEL0 0x0000
#define VAL_IOPORT4_SEL1 0x0000
-#define VAL_IOPORT4_IES 0x0000
-#define VAL_IOPORT4_IE 0x0000
/*
- * Port D setup:
+ * Port E setup:
*
* P9.0 - BoosterPack BP27 (input pullup)
* P9.1 - BoosterPack BP28 (input pullup)
@@ -181,8 +173,6 @@ #define VAL_IOPORT5_REN 0xFF7F
#define VAL_IOPORT5_SEL0 0x0000
#define VAL_IOPORT5_SEL1 0x0000
-#define VAL_IOPORT5_IES 0x0000
-#define VAL_IOPORT5_IE 0x0000
/*
* Port J setup:
@@ -201,8 +191,6 @@ #define VAL_IOPORT0_REN 0x00CF
#define VAL_IOPORT0_SEL0 0x0030
#define VAL_IOPORT0_SEL1 0x0000
-#define VAL_IOPORT0_IES 0x0000
-#define VAL_IOPORT0_IE 0x0000
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
|