fish

4 files changed, 287 insertions, 0 deletions

diff --git a/Makefile b/Makefile
new file mode 100644
index 0000000..0611dcf
--- /dev/null
+++ b/Makefile
@@ -0,0 +1,91 @@
+PROJ=pong
+
+SRCS=$(wildcard *.vhd *.v *.qsf *.qpf )
+SRCS += $(shell find DM9000A -type f -print )
+SRCS += $(shell find GPU -type f -print )
+
+#BSP_DIR=bsp
+#QSYS=pong_mcu
+#SOPC_FILE=${QSYS}.sopcinfo
+#BSP_TYPE=hal
+#NIOS2_BSP_ARGS=""
+#CPU_NAME=
+
+#ELF=src/${PROJ}.elf
+#SOF=${PROJ}.sof
+
+#default: load_elf.stamp
+default: load_sof.stamp
+
+
+sta.stamp:asm.stamp
+	tools/wrap quartus_sta ${PROJ} -c ${PROJ}
+	touch $@
+
+asm.stamp:fit.stamp
+	tools/wrap quartus_asm --read_settings_files=off --write_settings_files=off ${PROJ} -c ${PROJ}
+	touch $@
+
+${SOF}:asm.stamp
+
+fit.stamp: ans.stamp
+	tools/wrap quartus_fit --read_settings_files=off --write_settings_files=off ${PROJ} -c ${PROJ}
+	touch $@
+
+ans.stamp: source.stamp
+	tools/wrap quartus_map --read_settings_files=on --write_settings_files=off ${PROJ} -c ${PROJ}
+	touch $@
+
+#${SOPC_FILE}:ans.stamp
+#
+#source.stamp:${SRC}
+#	touch source.stamp
+#
+#${ELF}: src/Makefile
+#	tools/wrap make -C src
+
+#elf.stamp:${ELF}
+#	touch $@
+	
+#src/Makefile: bsp.stamp
+#	tools/wrap nios2-app-generate-makefile --bsp-dir bsp --src-rdir src --app-dir src --elf-name ${PROJ}.elf
+
+#bsp.stamp:${SOPC_FILE}
+#	/bin/rm -rf ${BSP_DIR}
+#	mkdir -p ${BSP_DIR}
+#	tools/wrap nios2-bsp ${BSP_TYPE} ${BSP_DIR} ${SOPC_FILE} ${NIOS2_BSP_ARGS} ${CPU_NAME}
+#	tools/wrap make -C ${BSP_DIR}
+#	touch $@
+
+#load_elf.stamp:${ELF} load_sof.stamp
+#	tools/wrap nios2-download ${ELF} -g
+
+load_sof.stamp: ${SOF}
+	tools/wrap quartus_pgm -m JTAG -o "p;${SOF}"
+	touch $@
+
+sof.flash: ${SOF}
+	tools/wrap sof2flash --input=$< --output=$@ --epcs --verbose 
+
+#elf.flash: ${ELF} sof.flash
+#	tools/wrap elf2flash --input=${ELF} --output=$@ --epcs --after=sof.flash --verbose 
+
+#qsys:
+#	tools/wrap qsys-edit ${QSYS}.qsys --project-dir=${PWD} --system-info=DEVICE_FAMILY="Cyclone II" --system-info=DEVICE=EP2C8Q208C8 --system-info=DEVICE_SPEEDGRADE=8 --host-controller
+
+#${BSP_DIR}/system.h:bsp.stamp
+
+#flash: load_sof.stamp sof.flash elf.flash ${BSP_DIR}/system.h
+#	BASE=` grep EPCS_FLASH_CONTROLLER_0_BASE ${BSP_DIR}/system.h | awk '{print $$3}' ` && \
+#	tools/wrap nios2-flash-programmer sof.flash --base=$${BASE} --epcs --accept-bad-sysid --device=1 --instance=0 --program --verbose && \
+#	tools/wrap nios2-flash-programmer elf.flash --base=$${BASE} --epcs --accept-bad-sysid --device=1 --instance=0  --program --verbose -g
+
+clean:
+	/bin/rm -rf ${BSP_DIR} db incremental_db src/obj
+	/bin/rm -f ${SOPC_FILE} src/Makefile elf.flash sof.flash *.stamp ${SOF} ${ELF} *.rpt *.html *.summary *.pin *.jdi *.qws *.pof
+	/bin/rm -f src/${PROJ}.objdump src/${PROJ}.map 
+	/bin/rm -f sopc_builder_log.txt
+	
+	
+	
+
diff --git a/sdram.qpf b/sdram.qpf
new file mode 100644
index 0000000..ecd199f
--- /dev/null
+++ b/sdram.qpf
@@ -0,0 +1,30 @@
+# -------------------------------------------------------------------------- #

+#

+# Copyright (C) 1991-2012 Altera Corporation

+# Your use of Altera Corporation's design tools, logic functions 

+# and other software and tools, and its AMPP partner logic 

+# functions, and any output files from any of the foregoing 

+# (including device programming or simulation files), and any 

+# associated documentation or information are expressly subject 

+# to the terms and conditions of the Altera Program License 

+# Subscription Agreement, Altera MegaCore Function License 

+# Agreement, or other applicable license agreement, including, 

+# without limitation, that your use is for the sole purpose of 

+# programming logic devices manufactured by Altera and sold by 

+# Altera or its authorized distributors.  Please refer to the 

+# applicable agreement for further details.

+#

+# -------------------------------------------------------------------------- #

+#

+# Quartus II 32-bit

+# Version 12.0 Build 178 05/31/2012 SJ Web Edition

+# Date created = 21:48:38  September 12, 2013

+#

+# -------------------------------------------------------------------------- #

+

+QUARTUS_VERSION = "12.0"

+DATE = "21:48:38  September 12, 2013"

+

+# Revisions

+

+PROJECT_REVISION = "sdram"

diff --git a/sdram.qsf b/sdram.qsf
new file mode 100644
index 0000000..3ffdd0a
--- /dev/null
+++ b/sdram.qsf
@@ -0,0 +1,149 @@
+# -------------------------------------------------------------------------- #

+#

+# Copyright (C) 1991-2012 Altera Corporation

+# Your use of Altera Corporation's design tools, logic functions 

+# and other software and tools, and its AMPP partner logic 

+# functions, and any output files from any of the foregoing 

+# (including device programming or simulation files), and any 

+# associated documentation or information are expressly subject 

+# to the terms and conditions of the Altera Program License 

+# Subscription Agreement, Altera MegaCore Function License 

+# Agreement, or other applicable license agreement, including, 

+# without limitation, that your use is for the sole purpose of 

+# programming logic devices manufactured by Altera and sold by 

+# Altera or its authorized distributors.  Please refer to the 

+# applicable agreement for further details.

+#

+# -------------------------------------------------------------------------- #

+#

+# Quartus II 32-bit

+# Version 12.0 Build 178 05/31/2012 SJ Web Edition

+# Date created = 21:48:38  September 12, 2013

+#

+# -------------------------------------------------------------------------- #

+#

+# Notes:

+#

+# 1) The default values for assignments are stored in the file:

+#		sdram.qdf

+#    If this file doesn't exist, see file:

+#		assignment_defaults.qdf

+#

+# 2) Altera recommends that you do not modify this file. This

+#    file is updated automatically by the Quartus II software

+#    and any changes you make may be lost or overwritten.

+#

+# -------------------------------------------------------------------------- #

+

+

+set_global_assignment -name FAMILY "Cyclone II"
+set_global_assignment -name DEVICE EP2C8Q208C8
+set_global_assignment -name TOP_LEVEL_ENTITY sdram

+set_global_assignment -name ORIGINAL_QUARTUS_VERSION 12.0
+set_global_assignment -name PROJECT_CREATION_TIME_DATE "21:48:38  SEPTEMBER 12, 2013"
+set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
+set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
+set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
+set_global_assignment -name DEVICE_FILTER_PACKAGE "ANY QFP"
+set_global_assignment -name DEVICE_FILTER_PIN_COUNT 208
+set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
+set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
+set_location_assignment PIN_41 -to seven_seg[7]
+set_location_assignment PIN_40 -to seven_seg[6]
+set_location_assignment PIN_37 -to seven_seg[5]
+set_location_assignment PIN_43 -to seven_seg[4]
+set_location_assignment PIN_44 -to seven_seg[3]
+set_location_assignment PIN_39 -to seven_seg[2]
+set_location_assignment PIN_35 -to seven_seg[1]
+set_location_assignment PIN_34 -to seven_seg[0]
+set_location_assignment PIN_23 -to clk
+set_location_assignment PIN_27 -to rst_n
+set_location_assignment PIN_92 -to sdram_addr[12]
+set_location_assignment PIN_90 -to sdram_addr[11]
+set_location_assignment PIN_75 -to sdram_addr[10]
+set_location_assignment PIN_89 -to sdram_addr[9]
+set_location_assignment PIN_88 -to sdram_addr[8]
+set_location_assignment PIN_87 -to sdram_addr[7]
+set_location_assignment PIN_86 -to sdram_addr[6]
+set_location_assignment PIN_84 -to sdram_addr[5]
+set_location_assignment PIN_82 -to sdram_addr[4]
+set_location_assignment PIN_81 -to sdram_addr[3]
+set_location_assignment PIN_80 -to sdram_addr[2]
+set_location_assignment PIN_77 -to sdram_addr[1]
+set_location_assignment PIN_76 -to sdram_addr[0]
+set_location_assignment PIN_74 -to sdram_ba[1]
+set_location_assignment PIN_72 -to sdram_ba[0]
+set_location_assignment PIN_69 -to sdram_cas_n
+set_location_assignment PIN_46 -to sdram_cke
+set_location_assignment PIN_47 -to sdram_clk
+set_location_assignment PIN_45 -to sdram_cs_n
+set_location_assignment PIN_94 -to sdram_dq[15]
+set_location_assignment PIN_95 -to sdram_dq[14]
+set_location_assignment PIN_96 -to sdram_dq[13]
+set_location_assignment PIN_97 -to sdram_dq[12]
+set_location_assignment PIN_99 -to sdram_dq[11]
+set_location_assignment PIN_101 -to sdram_dq[10]
+set_location_assignment PIN_102 -to sdram_dq[9]
+set_location_assignment PIN_103 -to sdram_dq[8]
+set_location_assignment PIN_57 -to sdram_dq[7]
+set_location_assignment PIN_58 -to sdram_dq[6]
+set_location_assignment PIN_59 -to sdram_dq[5]
+set_location_assignment PIN_60 -to sdram_dq[4]
+set_location_assignment PIN_61 -to sdram_dq[3]
+set_location_assignment PIN_63 -to sdram_dq[2]
+set_location_assignment PIN_64 -to sdram_dq[1]
+set_location_assignment PIN_67 -to sdram_dq[0]
+set_location_assignment PIN_104 -to sdram_dqm[1]
+set_location_assignment PIN_56 -to sdram_dqm[0]
+set_location_assignment PIN_70 -to sdram_ras_n
+set_location_assignment PIN_68 -to sdram_we_n
+set_location_assignment PIN_41 -to seg[7]
+set_location_assignment PIN_160 -to dm9000_cmd
+set_location_assignment PIN_165 -to dm9000_cs_n
+set_location_assignment PIN_144 -to dm9000_data[15]
+set_location_assignment PIN_145 -to dm9000_data[14]
+set_location_assignment PIN_146 -to dm9000_data[13]
+set_location_assignment PIN_147 -to dm9000_data[12]
+set_location_assignment PIN_149 -to dm9000_data[11]
+set_location_assignment PIN_150 -to dm9000_data[10]
+set_location_assignment PIN_151 -to dm9000_data[9]
+set_location_assignment PIN_152 -to dm9000_data[8]
+set_location_assignment PIN_135 -to dm9000_data[7]
+set_location_assignment PIN_134 -to dm9000_data[6]
+set_location_assignment PIN_138 -to dm9000_data[5]
+set_location_assignment PIN_137 -to dm9000_data[4]
+set_location_assignment PIN_141 -to dm9000_data[3]
+set_location_assignment PIN_139 -to dm9000_data[2]
+set_location_assignment PIN_143 -to dm9000_data[1]
+set_location_assignment PIN_142 -to dm9000_data[0]
+set_location_assignment PIN_162 -to dm9000_rd_n
+set_location_assignment PIN_163 -to dm9000_wr_n
+set_location_assignment PIN_164 -to dm9000_rst_n
+set_location_assignment PIN_161 -to dm9000_int
+set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
+set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
+set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
+set_global_assignment -name SEARCH_PATH db/ip/sdram_mcu/ -tag from_archive
+set_global_assignment -name SEARCH_PATH db/ip/sdram_mcu/submodules/ -tag from_archive
+set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
+set_location_assignment PIN_108 -to vga_red[0]
+set_location_assignment PIN_113 -to vga_red[1]
+set_location_assignment PIN_112 -to vga_red[2]
+set_location_assignment PIN_128 -to vga_hs
+set_location_assignment PIN_115 -to vga_green[0]
+set_location_assignment PIN_114 -to vga_green[1]
+set_location_assignment PIN_117 -to vga_green[2]
+set_location_assignment PIN_116 -to vga_blue[0]
+set_location_assignment PIN_127 -to vga_blue[1]
+set_location_assignment PIN_118 -to vga_blue[2]
+set_location_assignment PIN_133 -to vga_vs
+
+set_global_assignment -name USE_CONFIGURATION_DEVICE ON
+set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
+set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "USE AS REGULAR IO"
+
+
+set_global_assignment -name PIN_FILE sdram.pin
+set_global_assignment -name VHDL_FILE sdram.v
+
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
diff --git a/sdram.vhd b/sdram.vhd
new file mode 100644
index 0000000..6ca4721
--- /dev/null
+++ b/sdram.vhd
@@ -0,0 +1,17 @@
+library IEEE;

+use IEEE.STD_LOGIC_1164.ALL;

+use IEEE.NUMERIC_STD.ALL;

+

+entity sdram is

+port (

+	clock_50	:	in	std_logic;	

+	DI		:	in	std_logic_vector(6 downto 0);

+	fish		:	out 	std_logic;

+	);

+end entity;

+

+architecture rtl of saa5050 is

+

+begin

+	fish <= clock_50;

+end architecture;