Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | sysclk back to 168MHz, 10Mhz -> TIM2old-master | fishsoupisgood | 2019-05-08 | 1 | -57/+184 |
* | switch to 10MHz system clock | fishsoupisgood | 2019-05-04 | 1 | -61/+147 |
* | cut #1 | fishsoupisgood | 2019-05-04 | 1 | -12/+148 |
* | switch to stlink, blinky | root | 2019-02-22 | 1 | -2/+2 |
* | add edge magic | fishsoupisgood | 2019-02-21 | 1 | -0/+1 |
* | use OCXO, and auto fail-over between different clock sources | fishsoupisgood | 2019-02-20 | 1 | -1/+18 |
* | Working | root | 2019-02-19 | 1 | -16/+19 |
* | everything working, even with fucked phy | root | 2019-02-19 | 1 | -22/+62 |
* | working ethernet | root | 2019-02-19 | 1 | -8/+40 |
* | happy dcf77 better pll, and stamps for long term stability | root | 2018-04-17 | 1 | -6/+11 |
* | working decoding | root | 2018-04-08 | 1 | -0/+55 |