Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | sysclk back to 168MHz, 10Mhz -> TIM2old-master | fishsoupisgood | 2019-05-08 | 13 | -86/+300 |
* | switch to 10MHz system clock | fishsoupisgood | 2019-05-04 | 2 | -61/+148 |
* | cut #1 | fishsoupisgood | 2019-05-04 | 28 | -229/+2277 |
* | fish | James | 2019-02-25 | 1 | -1/+1 |
* | switch to stlink, blinky | root | 2019-02-22 | 15 | -82/+194 |
* | add edge magic | fishsoupisgood | 2019-02-21 | 3 | -7/+17 |
* | use OCXO, and auto fail-over between different clock sources | fishsoupisgood | 2019-02-20 | 11 | -48/+109 |
* | fix offsets | root | 2019-02-19 | 6 | -45/+54 |
* | Working | root | 2019-02-19 | 12 | -436/+650 |
* | everything working, even with fucked phy | root | 2019-02-19 | 13 | -389/+509 |
* | working ethernet | root | 2019-02-19 | 25 | -174/+1712 |
* | remember old steth | root | 2019-02-19 | 1 | -12/+73 |
* | happy dcf77 better pll, and stamps for long term stability | root | 2018-04-17 | 9 | -89/+148 |
* | working decoding | root | 2018-04-08 | 45 | -0/+3088 |