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* Add some abc9 dff testsEddie Hung2019-12-311-0/+55
* Add -D DFF_MODE to abc9_map testEddie Hung2019-12-301-4/+4
* Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-12-3024-57/+224
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| * Merge pull request #1589 from YosysHQ/iopad_defaultMiodrag Milanović2019-12-3019-60/+61
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| | * Fix new testsMiodrag Milanovic2019-12-283-6/+6
| | * Merge remote-tracking branch 'origin/master' into iopad_defaultMiodrag Milanovic2019-12-284-0/+118
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| | * | Make test without iopadsMiodrag Milanovic2019-12-2817-51/+51
| | * | Revert "Fix xilinx tests, when iopads are default"Miodrag Milanovic2019-12-2816-40/+40
| | * | Addressed review commentsMiodrag Milanovic2019-12-211-1/+0
| | * | Fix xilinx tests, when iopads are defaultMiodrag Milanovic2019-12-2117-42/+44
| * | | Merge pull request #1599 from YosysHQ/eddie/retry_1588Eddie Hung2019-12-303-0/+48
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| | * | | Add #1598 testcaseEddie Hung2019-12-273-0/+48
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| * / | Update resource countEddie Hung2019-12-281-3/+3
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| * | Add DSP cascade testsEddie Hung2019-12-231-0/+89
| * | xilinx_dsp: Initial DSP48A/DSP48A1 support.Marcin Kościelnicki2019-12-223-0/+29
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* | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-12-1920-66/+750
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| * tests/xilinx: fix flaky mux testMarcin Kościelnicki2019-12-181-2/+4
| * xilinx: Add xilinx_dffopt pass (#1557)Marcin Kościelnicki2019-12-183-3/+232
| * xilinx: Improve flip-flop handling.Marcin Kościelnicki2019-12-183-11/+12
| * Merge pull request #1574 from YosysHQ/eddie/xilinx_lutramEddie Hung2019-12-1610-53/+228
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| | * Disable RAM16X1D testEddie Hung2019-12-131-17/+17
| | * Remove extraneous synth_xilinx callEddie Hung2019-12-121-2/+0
| | * Add tests for these new modelsEddie Hung2019-12-121-0/+40
| | * Add #1460 testcaseEddie Hung2019-12-121-0/+34
| | * Rename memory tests to lutram, add more xilinx testsEddie Hung2019-12-129-53/+156
| * | Add another testEddie Hung2019-12-161-1/+8
| * | Accidentally commented out testsEddie Hung2019-12-161-47/+47
| * | Add unconditional match blocks for force RAMEddie Hung2019-12-161-0/+9
| * | Merge blockram testsEddie Hung2019-12-163-47/+81
| * | Fixing compiler warning/issues. Moving test script to the correct placeDiego H2019-12-161-6/+6
| * | Removing fixed attribute value to !ramstyle rulesDiego H2019-12-151-3238/+0
| * | Merging attribute rules into a single match block; Adding testsDiego H2019-12-153-0/+3373
| * | Renaming BRAM memory tests for the sake of uniformityDiego H2019-12-132-6/+6
| * | Fixing citation in xc7_xcu_brams.txt file. Fixing RAMB36E1 test.Diego H2019-12-121-2/+2
| * | Adding a note (TODO) in the memory_params.ys check fileDiego H2019-12-121-0/+2
| * | Updating RAMB36E1 thresholds. Adding test for both RAMB18E1/RAMB36E1Diego H2019-12-122-0/+90
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* | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-12-123-23/+136
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| * Merge pull request #1545 from YosysHQ/eddie/ice40_wrapcarry_attrEddie Hung2019-12-093-23/+136
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| | * unmap $__ICE40_CARRY_WRAPPER in testEddie Hung2019-12-091-1/+21
| | * ice40_wrapcarry to really preserve attributes via -unwrap optionEddie Hung2019-12-091-3/+5
| | * Drop keep=0 attributes on SB_CARRYEddie Hung2019-12-061-2/+2
| | * Add WIP test for unwrapping $__ICE40_CARRY_WRAPPEREddie Hung2019-12-051-0/+30
| | * Check SB_CARRY name also preservedEddie Hung2019-12-031-0/+1
| | * Add testcaseEddie Hung2019-12-031-0/+60
* | | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-12-064-3/+302
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| * | tests: arch: xilinx: Change order of arguments in macc.shJan Kowalewski2019-12-061-1/+1
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| * Merge pull request #1524 from pepijndevos/gowindffinitClifford Wolf2019-12-033-2/+301
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| | * update testPepijn de Vos2019-12-031-2/+3
| | * Use -match-init to not synth contradicting init valuesPepijn de Vos2019-12-031-10/+12
| | * attempt to fix formattingPepijn de Vos2019-11-251-138/+138
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